• Proceedings of the Polymer Society of Korea Conference
• /
• 2006.10a
• /
• pp.171-171
• /
• 2006

In this presentation, we would like to report an inkjet printing method to produce 1 to 2 bit RFID tag working in the range of 6 to 28 MHz with or without transistors. The inkjet printing method especially for the formation of transistors, inductors, capacitors will be presented by the view of polymer chemistry. This presentation also includes the printing schemes for memory cell, ring oscillator, rectifier, antenna, and so forth for constructing RFID tag. I illustrate these strategies by describing recent my works on the formation of all SWNT-TFT and conducting polymer-silver nanocomposite inks that can be applied in the construction of electronic devices.

• Journal of the Korean Institute of Telematics and Electronics A
• /
• v.30A no.10
• /
• pp.41-50
• /
• 1993

This paper describes the fabrication process and electrical characteristics of PSA (Polysilicon Self-Align) bipolar transistors with a thin base width of 1100.angs.. To realize this shallow junction depth, one-step rapid thermal annealing(RTA) technology has been applied instead of conventional furnace annealing process. It has been shown that the series resistances and parasitic capacitances are significantly reduced in the device with emitter area of 1${\times}4{\mu}m^{2}$. The switching speed of 2.4ns/gate was obtained by measuring the minimum propagation delay time in the I$^{2}$L ring oscillator with 31 stages.

• JSTS:Journal of Semiconductor Technology and Science
• /
• v.16 no.5
• /
• pp.650-656
• /
• 2016

Voltage controlled oscillator (VCO) is widely used circuit component in high-performance microprocessors and modern communication systems as a frequency source. In present work, VCO designs using the different combination of NAND gates with three transistors and CMOS inverter are reported. Three, five and seven stages ring VCO circuits are designed. Coarse and fine tuning have been done using two different supply sources. The frequency with coarse tuning varies from 3.31 GHz to 5.60 GHz in three stages, 1.77 GHz to 3.26 GHz in five stages and 1.27 GHz to 2.32 GHz in seven stages VCO respectively. Moreover, for fine tuning frequency varies from 3.70 GHz to 3.94 GHz in three stages, 2.04 GHz to 2.18 GHz in five stages and 1.43 GHz to 1.58 GHz in seven stages VCO respectively. Results of power consumption and phase noise for the VCO circuits are also been reported. Results of proposed VCO circuits have been compared with previously reported circuits and present circuit approach show significant improvement.

• Journal of the Korean Institute of Telematics and Electronics C
• /
• v.34C no.7
• /
• pp.18-27
• /
• 1997

A CMOS 950 MHz frequency synthesizer is designed and fabricated in a 0.8.mu.m standard CMOS process for IS-95-A CDMA mobile communication transceivers To utilize a CMOS ring VCO in a CDMA wireless communication receisver, we employed a QDC (quasi-direct conversion) receiver architecture for CDMA applications. Realized RF frequency synthesizer used as the RF local oscillator for a QDC receiver exhibits a phase noise of -92 dBc/Hz at 885kHz offset from the 950.4 MHz carrier, which complies with IS-95-A CDMA specification. It has a rms jitter of 23.7 ps, and draws 30mA from a 5V supply. Measured I/Q phase error of the 950.4 output signals is 0.7 degree.

• The Transactions of the Korean Institute of Electrical Engineers
• /
• v.36 no.7
• /
• pp.462-469
• /
• 1987

A metal gate MOSFET with source/drain regions self-aligned to gate region is proposed. The proposed MOS transistor is fabricated by utilizing the higher oxidation rate of source/drain regions with high doping concentration when compared with channel region with moderate doping. The thick oxide on the source/drain regions reduces the gate and drain(source) overlap capacitance down to that of a self-aligned polysilicon gate device while allowing the use of a metal gate with much lower resistivity than the more commonly used polycrystalline silicon. A ring oscillator composed of 15 inverter stages has been computer simulated using SPICE. The results of the simulation show good agreement with experimental measurement confirming the fast switching speed of propesed MOSFET.

• The Transactions of The Korean Institute of Electrical Engineers
• /
• v.59 no.5
• /
• pp.1005-1009
• /
• 2010

This paper presents a digitally-controlled filter calibration technique for biquad RC filter using self oscillation. The biquad RC filter is converted to a fully-differential ring oscillator by changing its resistor connections, where the oscillation frequency reflects the cut-off frequency. The proposed calibration circuit measures the oscillation frequency by counting with a fixed higher-frequency clock and then tunes it to a desired frequency with a digital frequency-locked loop including a PI controller. Because the proposed circuit directly measures the cut-off frequency of the filter itself and calibrates it with the small area digital circuits, the area and the power consumption are much small compared with conventional works. When it is implemented in a 65nm CMOS process, the calibration circuit except the filter consumes the area of 80um X 50um and power consumption is 443uA at 1.2 V supply voltage.

• Journal of the Korean Institute of Telematics and Electronics A
• /
• v.29A no.8
• /
• pp.78-88
• /
• 1992

To improve the characteristics of sub$\mu$m short channel MOSFET device, a new device having the convex structure is proposed. This device has 3-dimensionally expandable channel length according to the vertical etched silicon height. For the purpose of comparing the DC and AC characteristics, planar device is also fabricated. Comparing the channel length, the convex device with 0.4$\mu$m silicon height is larger about 0.56$\mu$m in NMOS and 0.78$\mu$m in PMOS than planar devices. DC characteristics, such as threshold voltage, operational current, substrate current and breakdown voltage are compared together with AC characteristics using the ring oscillator inverter delay. Also process and device simulation are performed and the differences between convex and pranaldevice are also compared.

• Journal of information and communication convergence engineering
• /
• v.14 no.4
• /
• pp.268-271
• /
• 2016

An efficient inductive switching noise suppression technique for mixed-signal integrated circuits (ICs) using standard CMOS digital technology is proposed. The proposed design technique uses a parallel RC circuit, which provides a damping path for the switching noise. The proposed design technique is used for designing a mixed-signal circuit composed of a ring oscillator, a digital output buffer, and an analog noise sensor node for $0.13-{\mu}m$ CMOS digital IC technology. Simulation results show a 47% reduction in the on-chip inductive switching noise coupling from the noisy digital to the analog blocks in the same substrate without an additional propagation delay. The increased power consumption due to the damping resistor is only 67% of that of the conventional source damping technique. This design can be widely used for any kind of analog and high frequency digital mixed-signal circuits in CMOS technology

• Journal of the Korean Institute of Telematics and Electronics A
• /
• v.28A no.9
• /
• pp.743-751
• /
• 1991

This paper presents the 1.5\ulcorner PSA bipolar device which establishes the performance improvement such as the reduction of emitter resistance and substrate junction capacitance. To achieve the above electrical characteristics, RTA process and trench isolation technology were adapted. The emitter resistance and substrate capacitance of npn transistor having 1.5$[\times}6{\mu}m^{2}$emitter area was measured with 63$\Omega$and 28fF, respectively. The minimum propagation delay time shows 121ps at 0.7mW from the measurement of 31 stage ring oscillator.

• Journal of the Korean Institute of Telematics and Electronics
• /
• v.24 no.5
• /
• pp.786-793
• /
• 1987

This paper describes the design and fabrication of the polysilicon selfaligned bipolar transistor with 1.6\ulcorner epitaxy and SWAMI isolation technologies. This transistor has two levels of polysilicon. Also emitter and adjacent edge of polysilicon base contact of this PSA device are defined by the same mask, and emitter feature size is 2x4 \ulcorner. DC characteristic of the fabricated transistor was evaluated and analyzed for the SPICE input parameters. The minimum propagation delay time per gate of 330 ps at 1mW was obtained with 41 stage CML ring oscillator.