1 |
D. K. Su, M. J. Loinaz, S. Masui, and B. A. Wooley, "Experimental results and modeling techniques for substrate noise in mixed-signal integrated circuits," IEEE Journal of Solid-State Circuits, vol. 28, no. 4, pp. 420-430, 1993.
DOI
|
2 |
P. Basedau and Q. Huang, "A post processing method for reducing substrate coupling in mixed-signal integrated circuits," in Proceedings of 1995 Symposium on VLSI Circuits (Digest of Technical Papers), Kyoto, Japan, pp. 41-42, 1995.
|
3 |
S. Ardalan and M. Sachdev, "An overview of substrate noise reduction techniques," in Proceedings of 5th International Symposium on Quality Electronic Design (ISQED), San Jose, CA, pp. 291-296, 2004.
|
4 |
R. Senthinathan, J. L. Prince, and S. Nimmagadda, "Noise immunity characteristics of CMOS receivers and effects of skewing/damping CMOS output driver switching waveform on the 'simultaneous' switching noise," Microelectronics Journal, vol. 23, no. 1, pp. 29-36, 1992.
DOI
|
5 |
P. Larsson, "Resonance and damping in CMOS circuits with onchip decoupling capacitance," IEEE Transactions on Circuits and Systems I: Fundamental Theory and Applications, vol. 45, no. 8, pp. 849-858, 1998.
DOI
|
6 |
L. Forbes, B. Ficq, and S. Savage, "Resonant forward-biased guardring diodes for suppression of substrate noise in mixed-mode CMOS circuits," Electronics Letters, vol. 31, no. 9, pp. 720-721, 1995.
DOI
|
7 |
B. E. Owens, S. Adluri, P. Birrer, R. Shreeve, S. K. Arunachalam, K. Mayaram, and T. S. Fiez, "Simulation and measurement of supply and substrate noise in mixed-signal ICs," IEEE Journal of Solid-State Circuits, vol. 40, no. 2, pp. 382-391, 2005.
DOI
|