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http://dx.doi.org/10.5573/JSTS.2016.16.5.650

VCO Design using NAND Gate for Low Power Application  

Kumar, Manoj (University School of Information and Communication Technology GGS Indraprastha University)
Publication Information
JSTS:Journal of Semiconductor Technology and Science / v.16, no.5, 2016 , pp. 650-656 More about this Journal
Abstract
Voltage controlled oscillator (VCO) is widely used circuit component in high-performance microprocessors and modern communication systems as a frequency source. In present work, VCO designs using the different combination of NAND gates with three transistors and CMOS inverter are reported. Three, five and seven stages ring VCO circuits are designed. Coarse and fine tuning have been done using two different supply sources. The frequency with coarse tuning varies from 3.31 GHz to 5.60 GHz in three stages, 1.77 GHz to 3.26 GHz in five stages and 1.27 GHz to 2.32 GHz in seven stages VCO respectively. Moreover, for fine tuning frequency varies from 3.70 GHz to 3.94 GHz in three stages, 2.04 GHz to 2.18 GHz in five stages and 1.43 GHz to 1.58 GHz in seven stages VCO respectively. Results of power consumption and phase noise for the VCO circuits are also been reported. Results of proposed VCO circuits have been compared with previously reported circuits and present circuit approach show significant improvement.
Keywords
CMOS; delay stage; noise; nand gate; power consumption;
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Times Cited By KSCI : 1  (Citation Analysis)
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