• JSTS:Journal of Semiconductor Technology and Science
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• v.15 no.3
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• pp.374-380
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• 2015

As semiconductor devices are being scaled down, random variation becomes a critical issue, especially in the case of static random access memory (SRAM). Thus, there is an urgent need for statistical methodologies to analyze the impact of random variations on the SRAM. In this paper, we propose a novel sampling method based on the concept of a confidence ellipse. Results show that the proposed method estimates the SRAM margin metrics in high-sigma regimes more efficiently than the standard Monte Carlo (MC) method.

• Journal of Advanced Navigation Technology
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• v.19 no.6
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• pp.544-551
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• 2015

In this paper, the design and implementation results of the optical flow estimator (OFE) for moving object detection (MOD) in advanced driver assistance system (ADAS). In the proposed design, Brox's algorithm with global optimization is considered, which shows the high performance in the vehicle environment. In addition, Cholesky factorization is applied to solve Euler-Lagrange equation in Brox's algorithm. Also, shift register bank is incorporated to reduce memory access rate. The proposed optical flow estimator was designed with Verilog-HDL, and FPGA board was used for the real-time verification. Implementation results show that the proposed optical flow estimator includes the logic slices of 40.4K, 155 DSP48s, and block memory of 11,290Kbits.

• Journal of Korean Society of Archives and Records Management
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• v.23 no.4
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• pp.47-71
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• 2023

Korea is a record powerhouse nation with the largest number of Memory of the World in the Asia-Pacific; however, active utilization of archives for future generations has been lacking. Therefore, this study sought to enhance interest in archives and utilize them directly in school lessons. The Korean National Debt Redemption Movement's archives, which were selected as a Memory of the World, were used in the school lessons, and based on them, a library collaborative instruction design was developed. A library collaborative instruction is a collaboration between the high school Korean history subject and the library information literacy instruction, designed in three sessions. Through the literature research-based design, a library collaborative instruction plan, teaching and learning plan, and activity sheets were derived. Implementing this designed library collaborative instruction is expected to stimulate interest in the Memory of the World, linking curriculum and archives at schools and significantly expanding the users of the archives into teachers and students.

• Journal of IKEEE
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• v.28 no.3
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• pp.451-457
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• 2024

This paper proposes a method for predicting agricultural product prices by utilizing various variables such as price, climate factors, demand, and import volume as data, and applying the Long Short-Term Memory (LSTM) model. The analysis of prediction performance using the LSTM model, which learns the long-term dependencies of time series data, showed that integrating diverse data improved performance compared to traditional methods. Furthermore, even when predicting without price data as a dependent variable, meaningful results were achieved using only independent variables, indicating the potential for further model development. Moreover, it was found that using a multi-variable model could further enhance prediction performance, suggesting that this complex approach is effective in improving the accuracy of cabbage price predictions.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.46 no.9
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• pp.14-24
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• 2009

Memory cell array and peripheral circuits are designed for system on panel style frame buffer. Moreover, a parallel test methodology to test multiple blocks of memory cells is proposed to overcome low yield of system on panel processing technologies. It is capable of faster fault detection compared to conventional memory tests and also applicable to the tests of various embedded memories and conventional SRAMs. The various patterns of conventional test vectors can be used to enhance fault coverage. The proposed testing method is also applicable to hierarchical bit line and divided word line, one of design trends of recent memory architectures.

• Journal of information and communication convergence engineering
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• v.12 no.3
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• pp.181-185
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• 2014

The lifetime of a solid-state drive (SSD) is limited because of the number of program and erase cycles allowed on its NAND flash blocks. Data cannot be overwritten in an SSD, leading to an out-of-place update every time the data are modified. This result in two copies of the data: the original copy and a modified copy. This phenomenon is known as write amplification and adversely affects the endurance of the memory. In this study, we address the issue of reducing wear leveling through efficient handling of write requests. This results in even wearing of all the blocks, thereby increasing the endurance period. The focus of our work is to logically divert the write requests, which are concentrated to limited blocks, to the less-worn blocks and then measure the maximum number of write requests that the memory can handle. A memory without the proposed algorithm wears out prematurely as compared to that with the algorithm. The main feature of the proposed algorithm is to delay out-of-place updates till the threshold is reached, which results in a low overhead. Further, the algorithm increases endurance by a factor of the threshold level multiplied by the number of blocks in the memory.

• Transactions on Electrical and Electronic Materials
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• v.15 no.2
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• pp.73-76
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• 2014

$Pt/Al_2O_3/La_2Si_5O_x/SiO_2/Si$ charge trap memory capacitors were prepared, in which the $La_2Si_5O_x$ film was used as the charge trapping layer, and the effects of post annealing atmospheres ($NH_3$ and $N_2$) on their memory characteristics were investigated. $La_2O_3$ nanocrystallites, as the storage nodes, precipitated from the amorphous $La_2Si_5O_x$ film during rapid thermal annealing. The $NH_3$ annealed memory capacitor showed higher charge storage performances than either the capacitor without annealing or the capacitor annealed in $N_2$. The memory characteristics were enhanced because more nitrogen was incorporated at the $La_2Si_5O_x/SiO_2$ interface and interfacial reaction was suppressed after the $NH_3$ annealing treatment.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.39B no.7
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• pp.433-439
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• 2014

This paper proposes an architecture of two-stage string matching engine with content-addressable memory(CAM) and parallel bit-split string matchers for deep packet inspection(DPI). Each long signature is divided into subpatterns with the same length, where subpatterns are mapped onto the CAM in the first stage. The long pattern is matched in the second stage using the sequence of the matching indexes from the CAM. By adopting CAM and bit-split string matchers, the memory requirements can be greatly reduced in the heterogeneous string matching environments.

• Science of Emotion and Sensibility
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• v.14 no.1
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• pp.117-126
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• 2011

This study investigates the physical properties and manufacturing method of shape memory fabric for emotional garment made by polypropylene. For this purpose, polypropylene(PP) POY and SDY were texturized using low temperature and constant length heat treatment texturing technologies, respectively. The shape memory fabrics made using these texturized PP yarns were woven with two kinds of PET and PTT shape memory yarns on the air-jet loom and the various physical properties of four kinds of shape memory fabrics were measured and discussed. The tenacity and breaking strain of PP texturized yarns treated by low temperature and constant length heat treatment showed high weaving efficiency and the wet thermal shrinkage of PP textured yarns was shown less than 1.5%, dry thermal shrinkage was ranged between 3% and 5%, which means thermal stability compared to the PTT textured yarn with high thermal shrinkage, 5~8%. The shape memory characteristics of PP shape memory fabrics measured by Toray method showed five grade as same value as PTT shape memory fabric. The heat keeping property of the PP shape memory fabric showed 56% higher value than that of PTT shape memory fabric. The water repellency of PP shape memory fabric measured by spray method showed five grade as same value as PTT shape memory fabric treated with water repellent agent. Especially, shape memory properties of PP shape memory fabric measured by 3-D image and camera measurement methods showed similar characteristics to the PTT shape memory fabric.

• Transactions on Electrical and Electronic Materials
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• v.15 no.5
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• pp.241-244
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• 2014

Charge trap flash memory capacitors incorporating $(HfO_2)_x(Al_2O_3)_{1-x}$ film, as the charge trapping layer, were fabricated. The effects of the charge trapping layer composition on the memory characteristics were investigated. It is found that the memory window and charge retention performance can be improved by adding Al atoms into pure $HfO_2$; further, the memory capacitor with a $(HfO_2)_{0.9}(Al_2O_3)_{0.1}$ charge trapping layer exhibits optimized memory characteristics even at high temperatures. The results should be attributed to the large band offsets and minimum trap energy levels. Therefore, the $(HfO_2)_{0.9}(Al_2O_3)_{0.1}$ charge trapping layer may be useful in future nonvolatile flash memory device application.