• 한국정보디스플레이학회:학술대회논문집
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• 한국정보디스플레이학회 2004년도 Asia Display / IMID 04
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• pp.1027-1029
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• 2004

In this paper, we have fabricated pentacene thin film transistors (TFTs) using polyvinylphenol (PVP) copolymer and cross-linked PVP as gate insulator on glass and plastic (PET) substrate. Depending on the density of PVP and cross-link material the performance has been changed. We obtained the best device performance with the mobility of 0.32cm2/V${\cdot}$sec and the on/off current ratio of 1.19${\times}$106 for the case of 10wt% PVP copolymer mixed with 5wt% poly (melamine-co-formaldehyde). Additionally using pentacene TFTs with the above PVP gate insulator, we fabricated the integrated circuits including inverter which produced the gain of 9.7.

• 조명전기설비학회논문지
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• 제25권12호
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• pp.48-53
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• 2011

Polymer thin films were prepared by capacitively coupled plasma polymerization process for application of gate insulator. The polymer thin films revealed to form polymer layers with original properties of the monomer. Among the plasma polymer thin films, the styrene polymer having large number of phenyl sites revealed higher dielectric constant of k=3.7 than that of conventional polymer. The plasma polymerized styrene thin film revealed no hysteresis characteristics and low leakage current density of $1{\times}10^{-8}[Acm^{-2}]$ at field strength of $1[MVcm^{-1}]$, which measured by I-V and C-V measurements using MIM and MIS devices.

• 한국응용과학기술학회지
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• 제19권4호
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• pp.335-338
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• 2002

A new process for polymeric gate insulator in field-effect transistors was proposed. Fourier transform infrared absorption spectra were measured in order to identify ODPA-ODA polyimide. Its breakdown field and electrical conductivity were measured. All-organic thin-film transistors with a stacked-inverted top-contact structure were fabricated to demonstrate that thermally evaporated polyimide films could be used as a gate insulator. As a result, the transistor performances with evaporated polyimide was similar with spin-coated polyimide. It seems that the mass-productive in-situ solution-free processes for all-organic thin-film transistors are possible by using the proposed method without vacuum breaking.

• 한국정보디스플레이학회:학술대회논문집
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• 한국정보디스플레이학회 2008년도 International Meeting on Information Display
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• pp.664-666
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• 2008

Low-temperature curable organic insulator was prepared through blending of polyimide type base resin and cross-linking agent. The newly developed resin can be formed into films using a wet process and cured at $130^{\circ}C$. Using the low temperature cured film as the gate dielectric layer, the field effect mobility of $0.15\;cm^2/V{\cdot}s$ was obtained from a pentacene field effect transistor in the saturation regime and no hysteresis behavior was observed in transfer curves.

• 한국재료학회지
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• 제24권3호
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• pp.135-139
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• 2014

To obtain the transistor with ambipolar transfer characteristics, IGZO/SiOC thin film transistor was prepared on SiOC with various polarities as a gate insulator. The interface between a channel and insulator showed the Ohmic and Schottky contacts in the bias field of -5V ~ +5V. These contact characteristics depended on the polarities of SiOC gate insulators. The transfer characteristics of TFTs were observed the Ohmic contact on SiOC with polarity, but Schottky contact on SiOC with low polarity. The IGZO/SiOC thin film transistor with a Schottky contact in a short range bias electric field exhibited ambipolar transfer characteristics, but that with Ohmic contact in a short range electric field showed unipolar characteristics by the trapping phenomenon due to the trapped ionized defect formation.

• 한국정보디스플레이학회:학술대회논문집
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• 한국정보디스플레이학회 2007년도 7th International Meeting on Information Display 제7권1호
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• pp.871-874
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• 2007

We have synthesized a novel fully soluble and low-temperature processable polyimide gate insulator (KSPI) through one-step condensation polymerization. For the preparation of KSPI, 5- (2,5-dioxytetrahydrofuryl)-3-methly-3-cyclohexene- 1,2-dicarboxylic anhydride (DOCDA) and 4,4- diaminodiphenylmethane (MDA) were used as monomers and fully imidized KSPI was completely soluble in organic solvents like ${\gamma}-butyrolactone$ and 2-butoxyethanol, etc.

• 대한전기학회:학술대회논문집
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• 대한전기학회 1996년도 하계학술대회 논문집 C
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• pp.1450-1452
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• 1996

In order to optimize the characteristics of gate insulator for FED(field emission device), we investigated the effect of wet-etching process on the gate insulator for fabrication of FED. We used the general three types of etchants for fabrication of the metal tip FEA(field emitter array), they are MO and oxide etchants to form the gate hole, and Al etchant to remove the release layer. In the result of the breakdown field of the insulator by the measure of the current-voltage characteristics, the breakdown field of insulator for immersing in oxide etchant was rapidly lowering with increasing etching time, but that for immersing in Al etchant was slow lowering. Also, in comparing cleaning with non-cleaning samples, the breakdown field of the cleaning samples was higher than that of non-cleaning samples.

• 한국진공학회:학술대회논문집
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• 한국진공학회 2014년도 제46회 동계 정기학술대회 초록집
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• pp.344-344
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• 2014

Transparent amorphous oxide semiconductors such as a In-Ga-Zn-O (a-IGZO) have advantages for large area electronic devices; e.g., uniform deposition at a large area, optical transparency, a smooth surface, and large electron mobility >10 cm2/Vs, which is more than an order of magnitude larger than that of hydrogen amorphous silicon (a-Si;H).1) Thin film transistors (TFTs) that employ amorphous oxide semiconductors such as ZnO, In-Ga-Zn-O, or Hf-In-Zn-O (HIZO) are currently subject of intensive study owing to their high potential for application in flat panel displays. The device fabrication process involves a series of thin film deposition and photolithographic patterning steps. In order to minimize contamination, the substrates usually undergo a cleaning procedure using deionized water, before and after the growth of thin films by sputtering methods. The devices structure were fabricated top-contact gate TFTs using the a-IGZO films on the plastic substrates. The channel width and length were 80 and 20 um, respectively. The source and drain electrode regions were defined by photolithography and wet etching process. The electrodes consisting of Ti(15 nm)/Al(120 nm)/Ti(15nm) trilayers were deposited by direct current sputtering. The 30 nm thickness active IGZO layer deposited by rf magnetron sputtering at room temperature. The deposition condition is as follows: a rf power 200 W, a pressure of 5 mtorr, 10% of oxygen [O2/(O2+Ar)=0.1], and room temperature. A 9-nm-thick Al2O3 layer was formed as a first, third gate insulator by ALD deposition. A 290-nm-thick SS6908 organic dielectrics formed as second gate insulator by spin-coating. The schematic structure of the IGZO TFT is top gate contact geometry device structure for typical TFTs fabricated in this study. Drain current (IDS) versus drain-source voltage (VDS) output characteristics curve of a IGZO TFTs fabricated using the 3-layer gate insulator on a plastic substrate and log(IDS)-gate voltage (VG) characteristics for typical IGZO TFTs. The TFTs device has a channel width (W) of $80{\mu}m$ and a channel length (L) of $20{\mu}m$. The IDS-VDS curves showed well-defined transistor characteristics with saturation effects at VG>-10 V and VDS>-20 V for the inkjet printing IGZO device. The carrier charge mobility was determined to be 15.18 cm^2 V-1s-1 with FET threshold voltage of -3 V and on/off current ratio 10^9.

• 한국전기전자재료학회논문지
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• 제24권9호
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• pp.693-696
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• 2011

Recently, amorphous oxide semiconductors (AOSs) based thin-film transistors (TFTs) have received considerable attention for application in the next generation displays industry. The research trends of AOSs based TFTs investigation have focused on the high device performance. The electrical properties of the TFTs are influenced by trap density. In particular, the threshold voltage ($V_{th}$) and subthreshold swing (SS) essentially depend on the semiconductor/gate-insulator interface trap. In this article, we investigated the effects of Ar plasma-treated $SiO_2$ insulator on the interfacial property and the device performances of amorphous indium gallium zinc oxide (a-IGZO) TFTs. We report on the improvement in interfacial characteristics between a-IGZO channel layer and gate insulator depending on Ar power in plasma process, since the change of treatment power could result in different plasma damage on the interface.

• 한국전기전자재료학회논문지
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• 제18권2호
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• pp.120-124
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• 2005

In this work, MOS capacitors were used to study the electrical properties of Mo gate electrode deposited on ZrO$_2$. The workfunctions of Mo gate extracted from C-V curves were appropriate for PMOS. Thermal stability of Mo metal was investigated by analyzing the variations of workfunction and EOT(effective oxide thickness) after 600, 700, and 800 $^{\circ}C$ RTA(rapid thermal annealing). It was found that Mo gate was stable up to 800 $^{\circ}C$ with underlying ZrO$_2$. The resistivities of Mo were 35$\mu$Ω$.$cm∼ 75$\mu$Ω$.$cm. These values are lower than those of heavily doped polysilicon. Based on these measurements, it can be concluded that Mo metal gate with ZrO$_2$ gate insulator is an excellent gate material for PMOS.