• Proceedings of the Korean Society of Precision Engineering Conference
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• 2010.11a
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• pp.369-370
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• 2010

• Proceedings of the KIEE Conference
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• 2011.07a
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• pp.25-26
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• 2011

In this paper, we investigated the effect of various annealing processes on the electrical characteristics of oxide thin film transistors (TFTs). When we annealed the TFT devices before and after source/drain (S/D) process, we could observe the different electrical characteristics of oxide TFTs. When we annealed the TFTs after deposition of transparent indium zinc oxide S/D electrodes, the annealing process decreased the contact resistance but increased the resistivity of S/D electrodes. The field effect mobility, subthreshold slope and threshold voltage of the oxide TFTs annealed before and after S/D process were 5.83 and 4.47 $cm^2$/Vs, 1.20 and 0.82 V/dec, and 3.92 and 8.33 V respectively. To analyze the differences, we measured the contact resistances and the carrier concentrations using transfer length method (TLM) and Hall measurement.

• Korean Journal of Materials Research
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• v.26 no.1
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• pp.42-46
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• 2016

The properties of zinc oxynitride semiconductors and their associated thin film transistors are studied. Reactively sputtered zinc oxynitride films exhibit n-type conduction, and nitrogen-rich compositions result in relatively high electron mobility. Nitrogen vacancies are anticipated to act as shallow electron donors, as their calculated formation energy is lowest among the possible types of point defects. The carrier density can be reduced by substituting zinc with metals such as gallium or aluminum, which form stronger bonds with nitrogen than zinc does. The electrical properties of gallium-doped zinc oxynitride thin films and their respective devices demonstrate the carrier suppression effect accordingly.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2008.05a
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• pp.727-729
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• 2008

Organic field-effort transistors (OFETs) are of interest for use in widely area electronic applications. We fabricated a copper phthalocyanine (CuPc) based field-effect transistor with different metal electrode. The CuPc FET device was made a top-contact type and the substrate temperature was room temperature. The source and drain electrodes were used an Au and Al materials. The CuPc thickness was 40nm, and the channel length was $50{\mu}m$, channel width was 3mm. We observed a typical current-voltage (I-V) characteristics in CuPc FET with different electrode materials.

• Journal of the Institute of Electronics and Information Engineers
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• v.50 no.7
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• pp.102-108
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• 2013

In manufacturing of solution-processed organic electronic devices, a spin coating method is frequently used, but which has a big problem. Solvent in a solution has a decisive effect such as physical and chemical damage for successive solution-based film deposition. Such a severe damage by solvent restricts for fabricating building blocks of multi-layered films from solutions. In this work, it will be shown that a proper combination of well-known solvents gives a chance to fabricate multi-layered film, also this new method was applied to make organic field effect transistor. Two types of bottom gate, bottom contact transistors were fabricated, one of which is fabricated by conventional single spin coating method, the other fabricated by double spin coating method. Compared with the electrical characteristics in a single spin coated transistor, the leakage current between source and gate electrode was decreased, ON state current was increased, and the extracted saturation mobility was multiplied more than 2.7 time for double spin coated transistors. It is suggested that the multiple coated gate dielectric structure is more desirable for high performance organic ferroelectric field effect transistors.

• Journal of information and communication convergence engineering
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• v.14 no.2
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• pp.115-121
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• 2016

Currently there is a lack of literature on SPICE-level models of double-gate (DG) tunnel field-effect transistors (TFETs). A DG TFET compact model is presented in this work that is used to develop a SPICE model for DG TFETs implemented with Verilog-A language. The compact modeling approach presented in this work integrates several issues in previously published compact models including ambiguity about the use of tunneling parameters A_k and B_k, and the use of a universal equation for calculating the surface potential of DG TFETs in all regimes of operation to deliver a general SPICE modeling procedure for DG TFETs. The SPICE model of DG TFET captures the drain current-gate voltage (I_ds-V_gs) characteristics of DG TFET reasonably well and offers a definite computational advantage over TCAD. The general SPICE modeling procedure presented here could be used to develop SPICE models for any combination of structural parameters of DG TFETs.

• JSTS:Journal of Semiconductor Technology and Science
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• v.5 no.2
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• pp.69-76
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• 2005

Interface-trap density, lifetime and Schottky barrier height of erbium-silicided Schottky diode are evaluated using equivalent circuit method. The extracted interface trap density, lifetime and Schottky barrier height for hole are determined as $1.5{\times}10^{13} traps/cm^2$, 3.75 ms and 0.76 eV, respectively. The interface traps are efficiently cured by $N_2$ annealing. Based on the diode characteristics, various sizes of erbium- silicided/platinum-silicided n/p-type Schottky barrier metal-oxide-semiconductor field effect transistors (SB-MOSFETs) are manufactured from 20 m to 35nm. The manufactured SB-MOSFETs show excellent drain induced barrier lowering (DIBL) characteristics due to the existence of Schottky barrier between source and channel. DIBL and subthreshold swing characteristics are compatible with the ultimate scaling limit of double gate MOSFETs which shows the possible application of SB-MOSFETs in nanoscale regime.

• Journal of the Korean Crystal Growth and Crystal Technology
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• v.17 no.5
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• pp.187-191
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• 2007

The device performance of ZnO-thin film transistors(ZnO-TFTs) with gate dielectrics of $SiO_2,\;SiN_x$ and Polyvinylphenol(PVP) having a bottom gate configuration were investigated. ZnO-TFTs can induce high device performance with low intrinsic carrier concentration of ZnO only by controlling gas flow rates without additional doping or annealing processes. The field effect mobility and on/off ratio of ZnO-TFTs with $SiN_x$ were $20.2cm^2V^{-1}s^{-1}\;and\;5{\times}10^6$ respectively which is higher than those previously reported. The device adoptable values of the mobility of $1.37cm^2V^{-1}s^{-1}$ and the on/off ratio of $6{\times}10^3$ were evaluated from the device with organic PVP dielectric.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.11 no.5
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• pp.1592-1596
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• 2010

According to the increase of the channel length with fixed width/length, characteristic curves of drain current as a function of gate bias voltage of indium gallium zinc oxide (IGZO) thin-film transistors moved to a positive direction of gate voltage, and field-effect mobility decreased. In case of fixed length and width of channel, field-effect mobility was lower and subthreshold slope was larger when drain bias voltage was higher. Due to large work function of IGZO, band bending at the junction region between IGZO channel and source/drain electrodes was expected to be in opposite direction to that between silicon and metal electrodes; this could explain the above results.

• Proceedings of the Korean Vacuum Society Conference
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• 2011.02a
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• pp.500-500
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• 2011

With recent advances in flexible and stretchable electronics, the development of physically responsive field-effect transistors (physi-FETs) that are easily integrated with transformable substrates may enable the omnipresence of physical sensing devices in electronic gadgets. However, physical stimuli typically induce whole sensing physi-FET devices under global influences that also cause changes in the parameters of FET transducers, such as channel mobility and dielectric capacitance that prevent proper interpretations of response in sensing materials. Extended-gate structures with isolated stimuli have been used recently in physi-FETs to demonstrate performances of sensing materials only. However, such approaches are limited to prototype researches since isolated stimuli rarely occur in real-life applications. In this report, we theoretically and experimentally demonstrated that integrating piezoelectric nanocomposites directly into flexible organic FETs (OFETs) as gate dielectrics provides a general research direction to physi-FETs with a simple device structure and the capability of precisely investigating functional materials. Measurements with static stimulations, which cannot be performed in conventional systems, exhibited giant-positive d33 values of nanocomposites of barium titanate (BT) NPs and poly (vinylidene fluoride-trifluoroethylene) (P(VDF-TrFE)).