• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2002.07a
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• pp.305-309
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• 2002

We have successfully fabricated a Metal-Ferroelectric-Insulator-Semiconductor (MFIS) structure using Bi$\sub$4-x/La$\sub$x/Ti$_3$O$\sub$12/ (BLT) ferroelectric thin film and SiO$_2$/Nitride/SiO$_2$ (ONO) stacked buffer layers for single transistor type ferroelectric nonvolatile memory applications. BLT films were deposited on 15 nm-thick ONO buffer layer by sol-gel spin-coating. The dielectric constant and the leakage current density of prepared ONO film were measured to be 5.6 and 1.0 x 10$\^$-8/ A/$\textrm{cm}^2$ at 2MV/cm, respectively, It was interesting to note that the crystallographic orientations of BLT thin films were strongly effected by pre-bake temperatures. X-ray diffraction patterns showed that (117) crystallites were mainly detected in the BLT film if pre-baked below 400$^{\circ}C$. Whereas, for the films pre-baked above 500$^{\circ}C$, the crystallites with preferred c-axis orientation were mainly detected. From the C-V measurement of the MFIS capacitor with c-axis oriented BLT films, the memory window of 0.6 V was obtained at a voltage sweep of ${\pm}$8 V, which evidently reflects the ferroelectric memory effect of a BLT/ONO/Si structure.

• Journal of IKEEE
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• v.25 no.4
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• pp.774-777
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• 2021

In this paper, we analyzed the gate controllability of 3D NAND Flash Memory with Charge Trap Flash using Ferroelectric (CTF-F) structure. HfO₂, a ferroelectric material, has a high-k characteristic besides polarization. Due to these characteristics, gate controllability is increased in CTF-F structure and on/off current characteristics are improved in Bit Line(BL). As a result of the simulation, in the CTF-F structure, the channel length of String Select Line(SSL) and Ground Select Line(GSL) was 100 nm, which was reduced by 33% compared to the conventional CTF structure, but almost the same off-current characteristics were confirmed. In addition, it was confirmed that the inversion layer was formed stronger in the channel during the program operation, and the current through the BL was increased by about 2 times.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.11 no.8
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• pp.596-600
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• 1998

A method for the nondestructive read-out of the memory in ferroelectric thin films is demonstrated using the detection second harmonic currents introduced in the ferrolelectric capacitor as a response to an ac signal. The sign and phase of the second harmonic current depends on the polarized state +$P_r or -P_r$, The studied ferroelectric PZT thin film is found to have desirable features for the use as a memory element. This method and material seems as a promising approach for the nonvolatile memory storage.

• The Transactions of the Korean Institute of Electrical Engineers P
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• v.51 no.2
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• pp.77-81
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• 2002

In this study, PZT thin films were fabricated using sol-gel processing onto Si/$SiO_2$/Ti/Pt substrates. PZT sol with different Zr/Ti ratio(20/80, 30/70, 40/60, 52/48) were prepared, respectively. The films were fabricated by using the spin-coating method on substrates. The films were heat treated at $450^{\circ}C$, $650^{\circ}C$ by rapid thermal annealing(RTA). The preferred orientation of the PZT thin films were observed by X-ray diffraction(XRD), and Scanning electron microscopy(SEM). All of the resulting PZT thin films were crystallized with perovskite phase. The fine crystallinity of the films were fabricated. Also, we found that the ferroelectric properties from the dielectric constant of the PZT thin films were over 600 degrees, P-E hysteresis constant. And the leakage current densities of films were lower than $10^{-8}A/cm^2$. It is concluded that the PZT thin films by sol-gel process to be convinced of application for ferroelectric memory device.

• JSTS:Journal of Semiconductor Technology and Science
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• v.2 no.3
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• pp.213-225
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• 2002

Metal-Ferroelectric- Insulator- Silicon (MFIS) structured field effect transistor (FET) device was fabricated and characterized. Important issues to realize ferroelectric gate field effect transistor device were summarized in three sections. The choice of interlayer dielectric was made in the consideration of device functionality and chemical reaction between ferroelectric materials and silicon surface during fabrication process. Also, various ferroelectric thin film materials were taken into account to meet desired memory window and process compatibility. Finally, MFIS structured FET device was fabricated and important characteristics were discussed. For feasible integration of current device as random access memory array cell address schemes were also suggested.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 1999.05a
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• pp.17-20
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• 1999

The retention and fatigue properties of ferroelectric LiNbO$_3$ thin films were studied. Metal-ferroelectric-semiconductor(MFS) devices by using rapid thermal annealed LiNbO$_3$/Si structures were successfully fabricated and demonstrated nonvolatile memory operations of the MFS devices. The I$_{D}$-V$_{G}$ characteristics of MFSFET\`s showed a hysteresis loop due to the ferroelectric nature of the LiNbO$_3$ thin film. The ferroelectric capacitors showed practically no polarization degradation up to about 10$^{10}$ switching cycles when subjected to symmetric bipolar voltage pulse (peak-to-peak 6V, 50% duty cycle) in the 500kHz. The retention properties of the LiNbO$_3$ thin films were quite good up to about 10$^{3}$ s . s .

• Proceedings of the KIEE Conference
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• 2006.10a
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• pp.105-106
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• 2006

The ferroelectric materials of the PZT, SBT attracted much attention for application to ferroelectric random access memory (FRAM) devices. Through the last decade, the lead zirconate titanate (PZT) is one of the most attractive perovskite-type materials for the ferroelectric products due to its higher remanant polarization and the ability to withstand higher coercive fields. FRAM has been currently receiving increasing attention for one of future memory devices due to its ideal memory properties such as non-volatility, high charge storage, and faster switching operations. In this study, we first applied the damascene process using chemical mechanical polishing (CMP) to the fabricate the $Pb_{1.1}(Zr_{0.52}Ti_{0.48})O_3$ thin film capacitor in order to solve the problems of plasma etching such as low etching profile and ion charging. The structural characteristics were compared with specimens before and after CMP process of PZT films. The scanning electron microscopy (SEM) analysis was performed to compare the morphology surface characteristics of $Pb_{1.1}(Zr_{0.52}Ti_{0.48})O_3$ capacitors. The densification by the vertical sidewall patterning and charging-free ferroelectric capacitor could be obtained by the damascene process without remarkable difference of the characteristics.

• Proceedings of the IEEK Conference
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• 2000.11b
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• pp.55-58
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• 2000

This paper describes a single transistor type ferroelectric field effect transistor (1T FeFET) memory celt scheme which can select one unit memory cell and program/read it. To solve the selection problem of 1T FeEET memory cell array, the row direction common well is electrically isolated from different adjacent row direction column. So, we can control voltage of common well line. By applying bias voltage to Gate and Well, respectively, we can implant IT FeEET memory cell scheme which no interface problem and can bit operation. The results of HSPICE simulations showed the successful operations of the proposed cell scheme.

• ETRI Journal
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• v.35 no.4
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• pp.734-737
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• 2013

Nonvolatile ferroelectric poly(vinylidene fluoride-co-trifluoroethylene) memory based on an organic thin-film transistor with inkjet-printed dodecyl-substituted thienylenevinylene-thiophene copolymer (PC12TV12T) as the active layer is developed. The memory window is 4.5 V with a gate voltage sweep of -12.5 V to 12.5 V. The field effect mobility, on/off ratio, and gate leakage current are 0.1 $cm^2/Vs$, $10^5$, and $10^{-10}$ A, respectively. Although the retention behaviors should be improved and optimized, the obtained characteristics are very promising for future flexible electronics.

• The Transactions of the Korean Institute of Electrical Engineers C
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• v.53 no.3
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• pp.128-132
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• 2004

The perovskite ferroelectric materials of the PZT, SBT and BST series will attract much attention for application to ULSI devices. Among these materials, the BST ($Ba_0.6$$Sr_0.4$/$TiO_3$) is widely considered the most promising for use as an insulator in the capacitors of DRAMS beyond 1 Gbit and high density FRAMS. Especially, BST thin films have a good thermal-chemical stability, insulating effect and variety of Phases. However, BST thin films have problems of the aging effect and mismatch between the BST thin film and electrode. Also, due to the high defect density and surface roughness at grain boundarys and in the grains, which degrades the device performances. In order to overcome these weakness, we first applied the chemical mechanical polishing (CMP) process to the polishing of ferroelectric film in order to obtain a good planarity of electrode/ferroelectric film interface. BST ferroelectric film was fabricated by the sol-gel method. And then, we compared the surface characteristics before and after CMP process of BST films. We expect that our results will be useful promise of global planarization for FRAM application in the near future.