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The Analysis of Gate Controllability in 3D NAND Flash Memory with CTF-F Structure

CTF-F 구조를 가진 3D NAND Flash Memory에서 Gate Controllability 분석

  • Kim, Beomsu (Dept. of Electronics Engineering, Korea National University of Transportation) ;
  • Lee, Jongwon (Dept. of Electronics Engineering, Korea National University of Transportation) ;
  • Kang, Myounggon (Dept. of Electronics Engineering, Korea National University of Transportation)
  • Received : 2021.11.17
  • Accepted : 2021.12.29
  • Published : 2021.12.31

Abstract

In this paper, we analyzed the gate controllability of 3D NAND Flash Memory with Charge Trap Flash using Ferroelectric (CTF-F) structure. HfO2, a ferroelectric material, has a high-k characteristic besides polarization. Due to these characteristics, gate controllability is increased in CTF-F structure and on/off current characteristics are improved in Bit Line(BL). As a result of the simulation, in the CTF-F structure, the channel length of String Select Line(SSL) and Ground Select Line(GSL) was 100 nm, which was reduced by 33% compared to the conventional CTF structure, but almost the same off-current characteristics were confirmed. In addition, it was confirmed that the inversion layer was formed stronger in the channel during the program operation, and the current through the BL was increased by about 2 times.

본 논문은 Charge Trap Flash using Ferroelectric(CTF-F) 구조를 가진 3D NAND Flash Memory gate controllability에 대해 분석했다. Ferroelectric 물질인 HfO2는 polarization 이외에도 high-k 라는 특징을 가진다. 이러한 특징으로 인해 CTF-F 구조에서 gate controllability가 증가하고 Bit Line(BL)에서 on/off 전류특성이 향상된다. Simulation 결과 CTF-F 구조에서 String Select Line(SSL)과 Ground Select Line(GSL)의 채널길이는 100 nm로 기존 CTF 구조에 비해 33% 감소했지만 거의 동일한 off current 특성을 확인했다. 또한 program operation에서 channel에 inversion layer가 더 강하게 형성되어 BL을 통한 전류가 약 2배 증가한 것을 확인했다.

Keywords

Acknowledgement

This work was supported in part by the Institute of Information and Communications Technology Planning and Evaluation (IITP) funded by the Korea government (MSIT) under Grant 2021-0-01764 and in part by the MOTIE (Ministry of Trade, Industry & Energy (10085645) and KSRC (Korea Semiconductor Research Consortium) support program for the development of the future semiconductor device and in part by Korea Institute for Advancement of Technology (KIAT) grant funded by the Korea Government (MOTIE) (N000P0008500, The Competency Development Program for Industry Specialist).

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