• Transactions on Electrical and Electronic Materials
• /
• v.17 no.6
• /
• pp.329-334
• /
• 2016

In this work, the temperature dependence of electrical parameters of nanoscale SOI (silicon-on-insulator) TG (triple gate) n-FinFET (n-channel Fin field effect transistor) was investigated. Numerical device simulator $ATLAS^{TM}$ was used to construct, examine, and simulate the structure in three dimensions with different models. The drain current, transconductance, threshold voltage, subthreshold swing, leakage current, drain induced barrier lowering, and on/off current ratio were studied in various biasing configurations. The temperature dependence of the main electrical parameters of a SOI TG n-FinFET was analyzed and discussed. Increased temperature led to degraded performance of some basic parameters such as subthreshold swing, transconductance, on-current, and leakage current. These results might be useful for further development of devises to strongly down-scale the manufacturing process.

• The Transactions of The Korean Institute of Electrical Engineers
• /
• v.66 no.10
• /
• pp.1494-1498
• /
• 2017

In this study, we investigate the influence of an overlap between the gate and source/drain regions of silicon nanowire (SiNW) CMOS (complementary metal-oxide-semiconductor) inverter on bendable plastic substrates and describe their electrical characteristics. The combination of n-channel silicon nanowire field-effect transistor (n-SiNWFET) and p-channel silicon nanowire field-effect transistor (p-SiNWFET) operates as an inverter logic gate. The gains with a drain voltage ($V_{dd}$) of 1 V are 3.07 and 1.21 for overlapped device and non-overlapped device, respectively. The superior electrical characteristics of each of the SiNW transistors including steep subthreshold slopes and the high $I_{on}/I_{off}$ ratios are major factors that enable the excellent operation of the logic gate.

• JSTS:Journal of Semiconductor Technology and Science
• /
• v.7 no.2
• /
• pp.110-119
• /
• 2007

A new two-dimensional analytical model for dual-material double-gate fully-depleted SOI MOSFET with Pearson-IV type Doping Distribution is presented. An investigation of electrical MOSFET parameters i.e. drain current, transconductance, channel resistance and device capacitance in DM DG FD SOI MOSFET is carried out with Pearson-IV type doping distribution as it is essential to establish proper profiles to get the optimum performance of the device. These parameters are categorically derived keeping view of potential at the center (${\phi}_c$) of the double gate SOI MOSFET as it is more sensitive than the potential at the surface (${\phi}_s$). The proposed structure is such that the work function of the gate material (both sides) near the source is higher than the one near the drain. This work demonstrates the benefits of high performance proposed structure over their single material gate counterparts. The results predicted by the model are compared with those obtained by 2D device simulator ATLAS to verify the accuracy of the proposed model.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
• /
• v.26 no.8
• /
• pp.582-586
• /
• 2013

In this paper, a simple macro model of n-channel MOSFET with dual workfunction gate (DWFG) structure is proposed. The DWFG MOSFET has higher transconductance and lower drain conductance than conventional MOSFET. Thus analog circuit design using the DWFG MOSFET can improve circuit characteristics. Currently, device models of the DWFG MOSFET are insufficient, so simple series connected two MOSFET model is proposed. In addition, a two stage operational amplifier using the proposed DWFG MOSFET macro model is designed to verify the model.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
• /
• 2007.11a
• /
• pp.75-76
• /
• 2007

Poly-Si Schottky barrier Thin Film Transistor (SB-TFT) is manufactured with erbium silicided source/drain. High quality poly-Si film was obtained by crystallizing the amorphous Si film with Excimer laser annealing (ELA) method. The fabricated poly-Si SB-TFT devices showed low leakage current and large on/off current ratio. Moreover, the electrical characteristics were considerably improved by 3% $H_2/N_2$ gas annealing, which is attributed to the reduction of trap states at the grain boundaries and interface trap states at gate oxide/poly-si channel.

• International Journal of Naval Architecture and Ocean Engineering
• /
• v.11 no.1
• /
• pp.52-58
• /
• 2019

Marine emissions of Volatile Organic Compounds (VOCs) have received much attention because the International Maritime Organization (IMO) requires the installation of vapour emission control systems for the loading of crude oils or petroleum products onto ships. It was recently recognised that significant corrosion occurs inside these vapour emission control systems, which can cause severe clogging issues. In this study, we analysed the chemical composition of drain water sampled from currently operating systems to investigate the primary causes of corrosion in vapour recovery systems. Immersion and electrochemical tests were conducted under simulated conditions with various real drain water samples, and the impact of corrosion on the marine vapour recovery system was carefully investigated. Moreover, corrosion tests on alternative materials were conducted to begin identifying appropriate substitutes. Thermodynamic calculations showed the effects of environmental factors on the production of condensed sulphuric acid from VOC gas. A model of sulphuric acid formation and accumulation by the characteristics of VOC from crude oil and flue gas is suggested.

• Journal of the Institute of Electronics Engineers of Korea SD
• /
• v.38 no.8
• /
• pp.54-61
• /
• 2001

A fully on-chip open-drain CMOS output driver was designed for high bandwidth DRAMs, such that its output voltage swing was insensitive to the variations of temperature and supply voltage. An auto refresh signal was used to update the contents of the current control register, which determined the transistors to be turned-on among the six binary-weighted transistors of an output driver. Because the auto refresh signal is available in DRAM chips, the output driver of this work does not require any external signals to update the current control register. During the time interval while the update is in progress, a negative feedback loop is formed to maintain the low level output voltage ($V_OL$) to be equal to the reference voltage ($V_{OL.ref}$) which is generated by a low-voltage bandgap reference circuit. Test results showed the successful operation at the data rate up to 1Gb/s. The worst-case variations of $V_{OL.ref}$ and $V_OL$ of the proposed output driver were measured to be 2.5% and 7.5% respectively within a temperature range of $20^{\circ}C$ to $90^{\circ}C$ and a supply voltage range of 2.25V to 2.75V, while the worst-case variation of $V_OL$ of the conventional output driver was measured to be 24% at the same temperature and supply voltage ranges.

• Polymer(Korea)
• /
• v.33 no.5
• /
• pp.397-406
• /
• 2009

We have fabricated source-drain electrodes for OTFTs using a screen-printing technique with carbon-black pastes as conductive paste. And effects of dispersants contents (SOP 10-40%) on the dispersity of carbon-black pastes and characteristics of screen-printed source-drain electrodes for OTFTs using two types of dispersants (DB-2150, DB-9077) were investigated. As contents of both dispersants were increased the dispersity of carbon-black mill-bases was improved, whereas the carbon-black pastes exhibited different dispersion characteristics. For the case of DB-2150, the dispersity of the pastes was improved with increasing dispersant content and the storage modulus G' in their rheology characteristics were reduced. But, for the DB-9077, the storage modulus G' of pastes were increased with dispersant content due to the flocculated network structure formed by interactions among carbon-black powders and dispersants. But, since this flocculated network structure of the pastes using DB-9077 resulted in the conduction path of carbon-black structures, the conductivities of screen-printed electrodes and mobilities of the OTFTs with them were better than those using pastes with DB-2150.

• Journal of the Korean Geosynthetics Society
• /
• v.7 no.4
• /
• pp.37-45
• /
• 2008

A pilot test using environmentally friendly drains, was carried out to evaluate their applicability potential in the field. The pilot test site was divided into 5 different areas, with several combinations of vertical and horizontal drains installed for evaluation. Conventional natural fiber drains (FDB), new developed straw drain board (SDB) and plastic drain board (PDB) were used as vertical drains, while sand and fiber mats were used as horizontal drains. Surface settlement rates and excess pore pressure generation/dissipation tendency of PDB and FDB are almost identical except those of SDB. Cone tip resistance obtained from cone penetration test measured at the end of 1st consolidation stage for upper soft layer definitely increased irrespective of types of vertical drains. The monitoring and site investigation test data obtained at the pilot test site prove the vertical natural fiber drains can be used as substitutes of conventional plastic and sand material.

• Journal of Sensor Science and Technology
• /
• v.18 no.1
• /
• pp.77-85
• /
• 2009

We propose a new image pixel architecture which has OFD(Over Flow Device) node by improving conventional 3TR pixel structure. Newly designed pixel consists of photo diode which is verified with HSPICE simulation, PMOS reset transistor, several NMOS and several PMOS transistors. Photodiode signals from each PMOS and NMOS are detected by Reset PMOS. These output signals give enough chances to detect wide operation coverage because OFD node has overflow photocurrent. According to various light intensity, we analyzed characteristic of the output voltage with a SPICE tool. Proposed pixel output has specific value which can detect possible from $0.1{\mu}W/cm^2$ to $10W/cm^2$ light intensity. It has wide-dynamic range of 160 dB.