• 대한전자공학회:학술대회논문집
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• 대한전자공학회 2003년도 하계종합학술대회 논문집 II
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• pp.695-698
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• 2003

This paper presents a Si power LDMOSFET for power amplifiers in the 1.8-2.2GHz frequency range for the base station of personal communication systems. To improve the cut-off frequency, the proposed Si power LDMOSFET has small gate to drain capacitance by shielding the electric fields with extended source electrode and forming the field oxide structure in drain region. The proposed Si power LDMOSFET can be used for a power amplifier and it has 32% of power added efficiency and 39.5dBm of output power when the supply voltage is 28V and the operating frequency is 1.9GHz.

• 대한전기학회:학술대회논문집
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• 대한전기학회 2006년도 제37회 하계학술대회 논문집 C
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• pp.1370-1371
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• 2006

An electrostatic discharge (ESD) protection device, so called, N-type extended drain silicon controlled rectifier (NEDSCR) device, was analyzed for high voltage I/O applications. A conventional NEDSCR device shows typical SCR-like characteristics with extremely low snapback holding voltage. This may cause latchup problem during normal operation. However, a modified NEDSCR device with proper junction / channel engineering demonstrates itself with both the excellent ESD protection performance and the high latchup immunity.

• 한국위성정보통신학회논문지
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• 제8권1호
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• pp.45-53
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• 2013

기존의 NEDSCR 소자는 매우 낮은 스냅백 홀딩전압과 낮은 온-저항을 가져 정상적인 동작 동안 래치업을 초래하므로 ESD 보호소자로 사용하는데 어려움이 있었다. 본 연구에서는 NEDSCR 소자의 시뮬레이션 및 TLP 테스트를 통해 이러한 단점들을 극복할 수 있는 새로운 방법을 제안하였다. 매우 우수한 ESD 보호 성능과 높은 래치업 면역 특성을 구현하기 위해 N+ 소오스 확산영역을 둘러싸는 P형의 CPS 이온주입공정을 추가함으로써 NEDSCR 소자의 스냅백 홀딩전압과 온 저항을 증가시켜 정전기 보호 성능을 개선시킬 수 있는 것으로 입증되었다.

• 한국위성정보통신학회논문지
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• 제7권2호
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• pp.18-24
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• 2012

본 논문에서는 ESD 방지를 위한 최적 방법론에 목표하여 확장된 드레인을 갖는 EDNMOS 소자의 더블 스냅백 현상 및 백그라운 도핑 농도 (BDC)의 영향을 조사하였다. 고전류 영역에서 낮은 BDC를 가진 EDNMOS 소자는 강한 스냅백으로 인해 취약한 ESD 성능과 높은 래치업 위험을 가지게 되나, 높은 BDC를 가진 EDNMOS 소자는 스냅백을 효과적으로 방지할 수 있음을 알 수 있었다. 따라서 BDC 제어로 안정적인 ESD 방지 성능과 래치업 면역을 구현할 수 있음을 밝혔다.

• Transactions on Electrical and Electronic Materials
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• 제17권3호
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• pp.143-145
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• 2016

In order to find suitable source and drain (S/D) electrodes for amorphous InGaZnO thin film transistors (a-IGZO TFTs), the specific contact resistance of interface between the channel layers and various S/D electrodes, such as Ti/Au, a-IZO and multilayer of a-IGZO/Ag/a-IGZO, was investigated using the transmission line model. The a-IGZO TFTs with a-IGZO/Ag/a-IGZO of S/D electrodes had good performance and low contact resistance due to the homo-junction with channel layer. The stability was measured with different electrodes by a positive bias stress test. The result shows the a-IGZO TFTs with a-IGZO/Ag/a-IGZO electrodes were more stable than other devices.

• JSTS:Journal of Semiconductor Technology and Science
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• 제12권4호
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• pp.482-491
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• 2012

In the present work, comprehensive investigation of the ambipolar characteristics of two silicon (Si) tunnel field-effect transistor (TFET) architectures (i.e. p-i-n and p-n-p-n) has been carried out. The impact of architectural modifications such as heterogeneous gate (HG) dielectric, gate drain underlap (GDU) and asymmetric source/drain doping on the ambipolar behavior is quantified in terms of physical parameters proposed for ambipolarity characterization. Moreover, the impact on the miller capacitance is also taken into consideration since ambipolarity is directly related to reliable logic circuit operation and miller capacitance is related to circuit performance.

• 한국콘크리트학회:학술대회논문집
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• 한국콘크리트학회 2009년도 춘계 학술대회 제21권1호
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• pp.425-426
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• 2009

본 연구는 새로운 터널 공법인 Composite 라이닝 공법의 터널 배수재로 적용될 최적경량기포모르타르 배합을 선정하고자, 기포율 변화에 따른 경량기포모르타르의 공극구조를 분석하였다. 그 결과, 3.0MPa이상의 소요강도 확보와 더불어 투수성에 우수한 연속기포의 형성 및 분포가 가장 잘 이루어진 것으로 예상되는 FCR배합이 적합할 것으로 판단된다.

• 한국정보디스플레이학회:학술대회논문집
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• 한국정보디스플레이학회 2008년도 International Meeting on Information Display
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• pp.270-271
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• 2008

The contact resistance between organic semiconductor and source-drain electrode in Bottom Contact Organic Thin-Film Transistors (BCOTFTs) can be effectively reduced by metal oxide/molybdenum double layer structure; metal oxide layers including nickel oxide (NiOx/Mo) and moly oxide(MoOx) under molybdenum work as a high performance carrier injection layer. Step profiles of source-drain electrode can be easily achieved by simultaneous etching of the double layers using the difference etching rate between metal oxides and metal layers.

• 한국농공학회논문집
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• 제52권6호
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• pp.95-100
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• 2010

Researchers developed Sediment Trap Drain Channel (STDC) as a solution of the reduction of soil erosion and muddy runoff from a alpine field. The STDC is the one that can take a role of grit chamber by installing the shield made of woods in the concrete channel. The study was conducted 8 kinds of stages according to the amount of soil loss and the inflow. Evaluation factors were ss concentration, turbidity and reduced soil. The results of study showed lessness of ss concentration and turbidity from the lower spot than the upper spot. The average reduction rate of ss concentration was 74 % and the average reduction rate of turbidity was 62 %. It was turned out that the performance related soil loss and muddy runoff of the STDC is effective. The governance was needed to expect the effectiveness of the STDC.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2006년도 하계학술대회 논문집 Vol.7
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• pp.97-98
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• 2006

High current behaviors of the grounded gate extended drain N-type metal-oxide-semiconductor field effects transistor (GG_EDNMOS) electro-static discharge (ESD) protection devices are analyzed. Simulation based contour analyses reveal that combination of BJT operation and deep electron channeling induced by high electron injection gives rise to the 2-nd on-state. Thus, the deep electron channel formation needs to be prevented in order to realize stable and robust ESD protection performance. Based on our analyses, general methodology to avoid the double snapback and to realize stable ESD protection is to be discussed.