• The Transactions of the Korean Institute of Electrical Engineers C
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• v.52 no.3
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• pp.116-122
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• 2003

This paper proposes an efficient method for computing the 3-dimensional capacitance of complex structures. The proposed method Is based on Finite Element Method(FEM) and expands the conventional FEM by adopting variable division. This method improves the extraction efficiency 50 times when compared to the conventional FEM with equal division. The proposed method can be used efficiently to extract electrical parameters of on/off-chip interconnects in VLSI systems.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.41 no.11
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• pp.53-59
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• 2004

This paper proposes an efficient method for computing the 3-dimensional capacitance of complex structures. The proposed method is based on applying numerical 2-dimensional capacitance extraction formula for 3-dimensional interconnect models. This method improves the extraction efficiency 952 times while compromising the accuracy within 1.8 percentage of maximal relative error, compared with the results of Fastcap program for various 3-D models. The proposed method can be used efficiently to extract electrical parameters of on/off-chip interconnects in VLSI systems.

• Journal of electromagnetic engineering and science
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• v.1 no.1
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• pp.78-82
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• 2001

For fast capacitance computation, a simple mesh refinement technique on MLFMA(Multi-Level Fast Multipole Algorithm) is proposed The triangular meshes are refined mainly in the area which has heavy charge density. The technique is applied to the capacitance extraction of three dimensional conductors. The results show good convergence with comparable accuracy. An adaptive technique concerned with MLFMA is useful to reduce computation time and the number of elements without additional computational efforts in large three dimensional problems.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.41 no.7
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• pp.1-6
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• 2004

For MOSFET devices with nanometer range gate length, accurate extraction of effective gate length is highly important because transistor characteristics become very sensitive to effective channel length. In this paper, we propose a new approach to extract the effective channel length of nanometer range MOSFET by Capacitance Voltage(C-V) method. The effective channel length is extracted using gate to source/drain capacitance( $C_{gsd}$). It is shown that 1/$\beta$ method, Terada method and other C-V method are inadequate to extract the accurate effective channel length. Therefore, the proposed method is highly effective for extraction of effective channel length of 100nm CMOSFETs.s.

• JSTS:Journal of Semiconductor Technology and Science
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• v.11 no.2
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• pp.130-133
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• 2011

A comparative study of two capacitance methods to measure the effective channel length in deep-submicron MOSFETs has been made in detail. Since the reduction of the overlap capacitance in the accumulation region is smaller than the addition of the inner fringe capacitance at zero gate voltage, the capacitance method removing the parasitic capacitance in the accumulation region extracts a more accurate effective channel length than the method removing that at zero gate voltage.

• Proceedings of the IEEK Conference
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• 1999.11a
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• pp.979-982
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• 1999

A new accurate as well as efficient multi-layer interconnect capacitance extraction method is presented. Since Multi-layer interconnects is too complicated to directly extract capacitances, it is simplified with virtual ground concept. To make the structure tractable, the shielding effects should be separately determined. Since the electric field shielding effects, and the solid-ground-based capacitance matrices can be readily determined from the layout geometry, the accurate as well as efficient quasi-3D capacitances concerned with an objective line can be readily determined. In order to demonstrate its efficiency and accuracy, the parameters and circuit responses were benchmarked with 3D-field-solver-based results.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.14 no.1
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• pp.27-32
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• 2003

This paper describes to extend the fast algorithm fur the capacitance extraction of large three-dimensional object. The triangular meshes are used and refined adaptively in the area where the heavy charges reside in each iterative solving. This technique is applied to the capacitance extraction of a 68-pin cerquad package. The results show fast convergence, and this adaptive technique coupled with the fast algorithm is efficient to reduce the number of elements and computing time with least additional computational efforts in large three dimensional problems.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.48 no.10
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• pp.62-66
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• 2011

In this study, a new RF method to extract the drain-source voltage Vds-dependent gate-bulk capacitance of deep-submicron MOSFETs is developed by determining Vds-independent gate-source overlap capacitance using measured S-parameters. The accuracy of extraction method is verified by observing good agreements between the measured and modeled S-parameters. The lateral channel doping profile in the drain region is experimentally measured using a Vds-dependent curve of the overlap and depletion length obtained from the extracted data.

• Proceedings of the IEEK Conference
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• 2001.06b
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• pp.353-356
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• 2001

This paper proposes an efficient method for 3-dimensional capacitance extraction based on Finite Element Method(FEM). This method expands the conventional FEM by adopting variable division. This method improves the extraction efficiency 2 to 100 times and even the accuracy 1% to 3% when compared to the conventional FEM with equal division. The Proposed method can be used efficiency to extract electrical parameters of on/off-chip interconnects in VLSI systems.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.13 no.1
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• pp.80-86
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• 2002

This paper describes to extend the MLFMA(Multi-Level Fast Multipole Algorithm) for three-dimensional capacitance computation in the case of conductors embedded in an arbitrary dielectric medium. The triangular meshes are used and refined in the area which has heavy charge density. This technique is applied to the capacitance extraction of three-dimensional structures with multiple dielectrics. The results show good convergence with the comparable accuracy, and this adaptive technique coupled with MLFMA is useful to reduce computing time and the number of elements with least additional computational efforts in large three dimensional problems.