• Journal of the Institute of Electronics Engineers of Korea SD
• /
• v.48 no.2
• /
• pp.35-43
• /
• 2011

In this paper, an analysis on I/Q mismatch characteristics of a quadrature LC VCO(Voltage controlled oscillator) is presented. Based on this analysis, a new I/Q mismatch compensator is proposed. The proposed I/Q mismatch compensator utilizes an amplitude mismatch detector rather than the conventional phase mismatch detector requiring much more wide frequency bandwidth. To verify the proposed circuit, a 2.5GHz quadrature LC VCO was designed in a $0.18{\mu}m$ CMOS process and tested. Test results show that an amplitude mismatch detector achieves similar I/Q mismatch compensation performance as that of the conventional phase mismatch detector. The I/Q mismatch compensator consumes 0.4mA from 1.8V supply voltage and occupies $0.04mm^2$.

• Journal of the Institute of Electronics Engineers of Korea TC
• /
• v.44 no.1
• /
• pp.79-84
• /
• 2007

In this paper, a fully-integrated low phase noise multi-band CMOS VCO using automatic level controller (ALC) and switched LC tank has been presented. The proposed VCO has been fabricated in a 0.13-um CMOS process. The switched LC tank has been designed with a pair of capacitors and two pairs of inductors switched using MOS switch. By using this structure, four band (2.986 ${\sim}$ 3.161, 3.488 ${\sim}$ 3.763, 4.736 ${\sim}$ 5.093, and 5.35 ${\sim}$ 5.887 GHz) operation is achieved in a single VCO. The VCO with 1.2 V power supply has phase noise of -118.105 dBc/Hz @ 1 MHz at 2.986 GHz and -113.777 dBc/Hz @ 1 MHz at 5.887 GHz, respectively. The reduced phase noise has been approximately -1 ${\sim}$ -3 dBc/Hz @ 1 MHz in the broadest tuning range, 2.986 ${\sim}$ 5.887 GHz. The VCO has consumed 4.2 ${\sim}$ 5.4 mW in the entire frequency band.

• JSTS:Journal of Semiconductor Technology and Science
• /
• v.15 no.3
• /
• pp.417-422
• /
• 2015

A 6.5 - 8.5 GHz CMOS UWB transmitter is implemented using $0.18{\mu}m$ CMOS technology. The transmitter is mainly composed of switched LC VCO and digital pulse generator (DPG). Using RF switch and DPG, the uniform power and sidelobe rejection are achieved irrespective of the carrier frequency. The measured UWB carrier frequency range is 7 ~ 8 GHz and the pulse width is tunable from 1 to 2 ns. The measured energy efficiency per pulse is 2.1 % and the power consumption is 0.6 mW at 10 Mbps without the buffer amplifier. The chip core size is $0.72mm^2$.

• ETRI Journal
• /
• v.34 no.4
• /
• pp.518-526
• /
• 2012

This paper proposes LC voltage-controlled oscillator (VCO) phase-locked loop (PLL) and ring-VCO PLL topologies with low-phase noise. Differential control loops are used for the PLL locking through a symmetrical transformer-resonator or bilaterally controlled varactor pair. A differential compensation mechanism suppresses out-band spurious tones. The prototypes of the proposed PLL are implemented in a CMOS 65-nm or 45-nm process. The measured results of the LC-VCO PLL show operation frequencies of 3.5 GHz to 5.6 GHz, a phase noise of -118 dBc/Hz at a 1 MHz offset, and a spur rejection of 66 dBc, while dissipating 3.2 mA at a 1 V supply. The ring-VCO PLL shows a phase noise of -95 dBc/Hz at a 1 MHz offset, operation frequencies of 1.2 GHz to 2.04 GHz, and a spur rejection of 59 dBc, while dissipating 5.4 mA at a 1.1 V supply.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
• /
• 2008.06a
• /
• pp.501-503
• /
• 2008

This paper presents the design of a 2.4 GHz low phase noise fully integrated LC Voltage-Controlled-Oscillator (VCO) in $0.18{\mu}m$ CMOS technology. The VCO is without any tail bias current sources for a low phase noise and, in which differential varactors are adopted for the symmetry of the circuit. At the same time, the use of differential varactors pairs reduces the tuning range, i.e., the frequency range versus VTUNE, so that the phase noise becomes lower. The simulation results show the achieved phase noise of -138.5 dBc/Hz at 3 MHz offset, while the VCO core draws 3.9mA of current from a 1.8V supply. The tuning range is from 2.28GHz to 2.55 GHz.

• Journal of the Institute of Electronics Engineers of Korea SD
• /
• v.44 no.6 s.360
• /
• pp.60-68
• /
• 2007

A technique is presented to extract differential second harmonic output from common source nodes of a cross-coupled P-& N-FET oscillator. Provided the impedances at the common source nodes are optimized and the fundamental swing at the VCO core stays in a proper mode, it is found that the amplitude and phase errors can be kept within $0{\sim}1.6dB$ and $+2.2^{\circ}{\sim}-5.6^{\circ}$, respectively, over all process/temperature/voltage corners. Moreover, an impedance-tuning circuit is proposed to compensate any unexpectedly high errors on the differential signal output. A Prototype 5-GHz VCO with a 2.5-Hz LC resonator is implemented in $0.18-{\mu}m$ CMOS. The error signal between the differential outputs has been measured to be as low as -70 dBm with the aid of the tuning circuit. It implies the push-push outputs are satisfactorily differential with the amplitude and phase errors well less than 0.34 dB and $1^{\circ}$, respectively.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
• /
• v.18 no.2 s.117
• /
• pp.213-218
• /
• 2007

In this paper, we propose the design and fabrication on high frequency CMOS VCO for DS-UWB(Direct-Sequence Ultra-WideBand) applications using 0.18 ${\mu}m$ process. The complementary cross-coupled LC oscillator architecture which is composed of PMOS, NMOS symmetrically, is designed for improving the phase noise characteristic. The resistor is used instead of current source that reduce the 1/f noise of current source. The high-speed buffer is needed for measuring the output characteristic of VCO using spectrum analyzer, therefore the high-speed inverter buffer is designed with VCO. A fabricated core VCO size is $340{\mu}m{\times}535{\mu}m$. The VCO is tunable between 7.09 and 7.52 GHz and has a phase noise lower than -107 dBc/Hz at 1-MHz offset over entire tuning range. The measured harmonic suppression is 32 dB. The VCO core circuit draws 2.0 mA from a 1.8 V supply.

• The Journal of The Korea Institute of Intelligent Transport Systems
• /
• v.4 no.2 s.7
• /
• pp.73-79
• /
• 2005

Various CMOS quadrature-voltage-controlled oscillators(QVCOS) are designed and fabricated for the comparison of the phase noise characteristic. The first one is that the QVCO is composed of two Colpitts oscillators cross-coupled with PMOS coupling transistors. The second and third ones are the conventional LC VCO and the balanced Colpitts VCO followed by the frequency-divide-by-two, respectively. The simulation result demonstrate that Colpitts schemes show better phase noise performance by 6 dB than that of a conventional stheme in which LC VCO is followed by the frequency-divide-by-two.

• Journal of the Institute of Electronics Engineers of Korea SD
• /
• v.46 no.7
• /
• pp.61-67
• /
• 2009

This paper reports an Integer-N phase locked loop (PLL) frequency synthesizer which was implemented in a 250nm standard digital CMOS process for a UHF RFID wireless communication system. The main blocks of PLL have been designed including voltage controlled oscillator, phase frequency detector, and charge pump. The LC VCO has been used for a better noise property and low-power design. The source and drain juntions of PMOS transistors are used as the varactor diodes. The ADF4111 of Analog Device has been used for the external pre-scaler and N-divider to divide VCO frequency and a third order RC filter is designed for the loop filter. The measured results show that the RF output power is -13dBm with 50$\Omega$ load, the phase noise is -91.33dBc/Hz at 100KHz offset frequency, and the maximum lock-in time is less than 600us from 930MHz to 970MHz.

• Proceedings of the IEEK Conference
• /
• 2002.06b
• /
• pp.145-148
• /
• 2002

In this paper, a voltage controlled oscillator (VCO) with automatic amplitude control is designed using a 0.35${\mu}{\textrm}{m}$ CMOS process. A cross-coupled PMOS pair is used for a negative resistance to compensate for the losses in the LC resonator, and an automatic\ulcorner amplitude control function is adapted to provide constant output power independent of the Q-factor of the LC resonator. The designed VCO operates in the 200MHz to 550MHz frequency range using different external resonators. The simulated phase noise is -128 dBc/Hz at 100KHz offset from the carrier frequency of 260MHz. It dissipates 0.㎽ from a 3V power supply. The area is 300${\mu}{\textrm}{m}$ x1201${\mu}{\textrm}{m}$.