• Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
• /
• v.19 no.3
• /
• pp.93-98
• /
• 2005

Silicon bipolar transistors (Si-BJT) are widely used in the telecommunication system such as short range wireless control and wireless indoor voice communication system. New modeling method for the internal current source model of Si-BJT is proposed. The proposed method based on new thermal resistance extraction method and new analytical expressions for the current source parameters of Si-BJT. The proposed method can directly extract the model parameters without any optimization procedure which is adopted in the conventional modeling method. The proposed method is applied to 5 finger $0.4\times20[{\mu}m^2]$ and the model shows good prediction of the measured data in $3[\%]$ of errors proving the validity of this method.

• Journal of the Institute of Electronics Engineers of Korea SD
• /
• v.40 no.4
• /
• pp.13-20
• /
• 2003

The model of the transistor saturation current of the BJT for integrated circuits based upon the semiconductor physics is proposed. The method for calculating the doping profile in the base region using process conditions is presented and the method for calculating the base Gummel number of lateral PNP BJT and vertical NPN BJT is proposed. The transistor saturation currents of NPN BJT using 20V and 30V process conditions obtained from the proposed method show an average relative error of 6.7% compared with the measured data and the transistor saturation currents of PNP BJT show an average relative error of 6.0% compared with the measured data.

• Journal of Sensor Science and Technology
• /
• v.23 no.4
• /
• pp.284-289
• /
• 2014

In this paper, modeling of a gate/body-tied (GBT) PMOSFET photodetector with built-in transfer gate is performed. It can control the photocurrent with a high-sensitivity. The GBT photodetector is a hybrid device consisted of a MOSFET, a lateral BJT, and a vertical BJT. This device allows for amplifying the photocurrent gain by $10^3$ due to the GBT structure. However, the operating parameters of this photodetector, including its photocurrent and transfer characteristics, were not known because modeling has not yet been performed. The sophisticated model of GBT photodetector using a process simulator is not compatible with circuit simulator. For this reason, we have performed SPICE modeling of the photodetector with reduced complexity using Cadence's Spectre program. The proposed modeling has been demonstrated by measuring fabricated chip by using 0.35 im 2-poly 4-metal standard CMOS technology.

• Journal of the Institute of Electronics Engineers of Korea SD
• /
• v.41 no.12
• /
• pp.21-26
• /
• 2004

In this paper, a direct method is developed to extact RF equivalent circuit of a packaged BJT without optimization. First, parasitic components of plastic package are removed from measured S-parameters using open and short package patterns. Using package do-embedded S-parameters, a direct and simple method is proposed to extract bonding wire inductance and chip pad capacitance between package lead and chip pad. The small-signal model parameters of internal BJT are next determined by Z and Y-parameter formula derived from RF equivalent circuit. The modeled S-parameters of packaged BJT agree well with measured ones, verifying the accuracy of this new extraction method.

• Journal of the Institute of Electronics and Information Engineers
• /
• v.49 no.12
• /
• pp.194-200
• /
• 2012

In this paper, we proposed a SPICE model of high-voltage insulated gate bipolar transistor(IGBT). The proposed model consists of two sub-devices, a MOSFET and a BJT. Basic I-V characteristics and their temperature dependency were realized by adjusting various parameters of the MOSFET and the BJT. To model nonlinear parasitic capacitances such as a reverse-transfer capacitance, multiple junction diodes, ideal voltage and current amplifiers, a voltage-controlled resistor, and passive devices were added in the model. The accuracy of the proposed model was verified by comparing the simulation results with the experimental results of a 1200V trench gate IGBT.

• Journal of Sensor Science and Technology
• /
• v.24 no.5
• /
• pp.353-357
• /
• 2015

A new SPICE-compatible model for a gate/body-tied PMOSFET photodetector (GBT PD) with an overlapping control gate is presented. The proposed SPICE-compatible model of a GBT PD with an overlapping control gate makes it possible to control the photocurrent. Research into GBT PD modeling was proposed previously. However, the analysis and simulation of GBT PDs is not lacking. This SPICE model concurs with the measurement results, and it is simpler than previous models. The general GBT PD model is a hybrid device composed of a MOSFET, a lateral bipolar junction transistor (BJT), and a vertical BJT. Conventional SPICE models are based on complete depletion approximation, which is more applicable to reverse-biased p-n junctions; therefore, they are not appropriate for simulating circuits that are implemented with a GBT PD with an overlapping control gate. The GBT PD with an overlapping control gate can control the sensitivity of the photodetector. The proposed sensor is fabricated using a $0.35{\mu}m$ two-poly, four-metal standard complementary MOS (CMOS) process, and its characteristics are evaluated.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
• /
• v.17 no.4
• /
• pp.367-372
• /
• 2004

Two new extraction methods for the thermal Resistance of HBT(Heterojunction Bipolar Transistors) are proposed. First, the analytical expression, based on the thermal characteristics that the base to emitter junction voltage drops with the increase of junction temperature, is derived. Second, the thermal resistance equation that can predict the measured DC(Direct Current) data optimally is derived. These optimal thermal resistance expression is applied to the 2 finger 2${\times}$20${\mu}{\textrm}{m}$-AlGaAs/GaAs HBT and shows the good agreement with the measured data.

• The Transactions of The Korean Institute of Electrical Engineers
• /
• v.62 no.5
• /
• pp.639-642
• /
• 2013

In this paper, proposed NED(nuclear event detectors) for detection of a transient radiation. Nuclear event detector was blocked of power temporary for defence of critical damage at a electric device when a induced transient radiation. Conventional NED consist of BJT, resistors and capacitors. The NED supply voltage of 5V and MCM(Multi Chip Module) structures. The proposed NED were designed for low supply voltage using 0.18um CMOS process. The response time of proposed NED was 34.8ns. In addition, pulse radiation experiments using a electron beam accelerator, the output signal has occurred.