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A SPICE-Compatible Model for a Gate/Body-Tied PMOSFET Photodetector With an Overlapping Control Gate

  • Jo, Sung-Hyun (School of Electronics Engineering, Kyungpook National University) ;
  • Bae, Myunghan (School of Electronics Engineering, Kyungpook National University) ;
  • Choi, Byoung-Soo (School of Electronics Engineering, Kyungpook National University) ;
  • Choi, Pyung (School of Electronics Engineering, Kyungpook National University) ;
  • Shin, Jang-Kyoo (School of Electronics Engineering, Kyungpook National University)
  • Received : 2015.08.28
  • Accepted : 2015.09.18
  • Published : 2015.09.30

Abstract

A new SPICE-compatible model for a gate/body-tied PMOSFET photodetector (GBT PD) with an overlapping control gate is presented. The proposed SPICE-compatible model of a GBT PD with an overlapping control gate makes it possible to control the photocurrent. Research into GBT PD modeling was proposed previously. However, the analysis and simulation of GBT PDs is not lacking. This SPICE model concurs with the measurement results, and it is simpler than previous models. The general GBT PD model is a hybrid device composed of a MOSFET, a lateral bipolar junction transistor (BJT), and a vertical BJT. Conventional SPICE models are based on complete depletion approximation, which is more applicable to reverse-biased p-n junctions; therefore, they are not appropriate for simulating circuits that are implemented with a GBT PD with an overlapping control gate. The GBT PD with an overlapping control gate can control the sensitivity of the photodetector. The proposed sensor is fabricated using a $0.35{\mu}m$ two-poly, four-metal standard complementary MOS (CMOS) process, and its characteristics are evaluated.

Keywords

References

  1. J. Ota, T. Tokuda, K. Kagawa, M. Nunoshita, and S. Shiosaka, "Pulse modulation CMOS image sensor for biofluorescence imaging applications," Proc. IEEE Symp. Circuits and Systems, Vol. 4, pp. 3487-3490, 2005.
  2. K. Murari, R. Etienne-Cummings, N. Thakor, and G. Cauwenberghs, "Which photodiode to use: a comparison of CMOS-compatible structures," IEEE Sensors J., Vol. 9, No. 7, pp. 752-760, July, 2009. https://doi.org/10.1109/JSEN.2009.2021805
  3. Y. Maruyama and E. Charbon, "An all-digital, time-gated 128$\times$128 SPAD array for on-chip, filter-less fluorescence detection," 16th International Solid-State Sensors, Actuators and Microsystems Conference (TRANSDUCERS), pp. 1180-1183, Beijing, China, 2011.
  4. N. Faramarzpour, M. J. Deen, S. Shirani, and Q. Fang, "Fully integrated single photon avalanche diode detector in standard CMOS 0.18 im technology," IEEE Trans. Electron Devices, Vol. 55, No. 3, pp. 760-767, 2008. https://doi.org/10.1109/TED.2007.914839
  5. F. G. O'Hara, "Physically based compact modelling on lateral pnp transistors," Master's course thesis, Trinity College, Dublin, Ireland, 1990.
  6. F. G. O'Hara, J. J. H. van den Biesen, H. C. de Graaff, W. J. Kloosterman, and J. B. Foley, "MODELLA-a new physics- based compact model for lateral p-n-p transistors," IEEE Trans. Electron Devices, Vol. 39, No. 11, pp. 2523-2561, 1992. https://doi.org/10.1109/16.163451
  7. F. Javier de la Hidalga and M. J. Deen, "The dynamic threshold voltage MOSFET," Proceedings of IEEE International Circuit and Systems, pp. 414-422, 2000.
  8. I. Kidron, "Integrated circuit model for lateral pnp transistors including isolation junction interaction," International J. Electronics, Vol. 31, No. 5, pp. 421-440, 1971. https://doi.org/10.1080/00207217108938241
  9. E. A. Vittoz, "MOS transistors operated in the lateral bipolar mode and their application in CMOS technology," IEEE J. Solid-State Circuits, Vol. 18, No. 3, pp. 273-279, 1983. https://doi.org/10.1109/JSSC.1983.1051939
  10. Mohamed Elgebaly and Manoj Sachdev, "A Sub-0.5 V Dynamic Threshold PMOS (DTPMOS) Scheme for Bulk CMOS Technologies", International Conference on Microelectronics, pp. 75-78, 2001.
  11. H. Yamamoto, K. Taniguchi, and C. Hamaguchi, "Highsensitivity SOI MOS photodetector with self-amplification," Japanese J. Applied Physics, Vol. 35, pp. 1382-1386, 1996. https://doi.org/10.1143/JJAP.35.1382
  12. W. Zhang, M. Chan, S. Fung, and P. K. Ko, "Performance of a CMOS compatible lateral bipolar photodetector on SOI substrate," IEEE Electron Device Lett., Vol. 19, No. 11, pp. 435-437, 1998. https://doi.org/10.1109/55.728904
  13. H. Y. Hyun, J. S. Kong, and J. K. Shin, "Low-noise logarithmic active pixel sensor using a gate/n-well-tied PMOSFET- type photodetector," Sensors and Materials, Vol. 19, No. 7, pp. 435-444, 2008.
  14. J. Jung, S.-H. Jo, S.-H. Seo1, M. Bae, and J.-K. Shin, "Highly sensitive gate/body-tied p-channel metal oxide semiconductor field effect transistor-type photodetector with an overlapping control gate", Japanese J. Applied Physics, Vol. 15, pp. 361-370, 2012.
  15. S. Y. Lee, S. H. Seo, J. S. Kong, S. H. Jo, K. H. Choi, P. Choi, and J. K. Shin, "Dynamic range extension of the nwell/ gate-tied PMOSFET-type photodetector with a built-in transfer gate," J. Sensor Science and Technology, Vol. 19, No. 4, pp. 328-335, 2010. https://doi.org/10.5369/JSST.2010.19.4.328
  16. Y.-J. Kook, J.-H. Cheon, J.-H. Lee, and Y.-J. Park, "A novel bipolar imaging device-BASIC (BAse stored imager in CMOS) process," IEEE Trans. Electron Devices, Vol. 50, No. 11, pp. 2189-2195, 2003. https://doi.org/10.1109/TED.2003.816912
  17. M. Lee, S.-H. Jo, M. Bae, B.-S. Choi, P. Choi, and J.-K. Shin, "Modeling of gate/body-tied PMOSFET photodetector with built-in transfer gate," J. Sensor Science and Technology, Vol. 23, No. 4, pp. 284-289, 2014. https://doi.org/10.5369/JSST.2014.23.4.284
  18. F. Assaderaghi, D. Sinitsky, S. Parke, J. Bokor, P. Ko, and C. Hu, "Dynamic threshold-voltage MOSFET (DTMOS) for ultra-low voltage VLSI," IEEE Trans. Electron Devices, Vol. 44, No. 3, pp. 414-421, 1997. https://doi.org/10.1109/16.556151