• Korean Journal of Forensic Psychology
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• v.12 no.2
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• pp.151-169
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• 2021

In the P300-based concealed information test, most commonly used methods to detect whether a subject is lying are the bootstrapped amplitude difference (BAD) and the bootstrap correlation difference (BCD). Previous studies comparing the accuracy of the two methods reported inconsistent results. Most studies showed that the BAD is more accurate than the BCD, but some studies found that the BCD had a higher accuracy rate than the BAD. The purpose of the study is to identify conditions where the each method has higher accuracy compared to the other. In the result of Monte Carlo study, the false alarm rate of the BAD was generally higher than that of the BCD, and the hit rate of the BAD was higher than that of the BCD. Compared to the condition where the P300 latencies of probe and irrelevant were similar, the hit rate of the BCD was decreased when the P300 latency of probe was about 100 ms faster, and the hit rate of the BCD was increased when the P300 latency of probe was about 100 ms slower. When the P300 amplitude of the probe was slightly larger than that of the irrelevant and the P300 latency of probe was longer than that of target, the hit rate of the BCD was higher than that of the BAD. The reason why the false alarm rate of the BAD is higher than that of BCD and why the hit rate of the BCD is affected by the P300 latency of the probe were discussed.

• Journal of the Institute of Electronics Engineers of Korea CI
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• v.40 no.5
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• pp.241-249
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• 2003

Carry lookahead(CLA) circuitry of decimal adders is proposed aiming at delay reduction. The truncation error in calculation of monetary interests may accumulate yielding a substantial amount of errors. Binary Coded Decimal(BCD) additions. for example, eliminate the truncation error in a fractional representation of decimal numbers. The proposed BCD carry lookahead scheme is aiming at the speed improvements without any truncation errors in the addition of decimal fractions. The delay estimation of the BCD CLA is demonstrated with improved performance in addition. Further reduction in delay can be achieved introducing non-weighted number system such as the excess-3 code.

• Journal of Advanced Navigation Technology
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• v.20 no.1
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• pp.65-71
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• 2016

Quantum-dot cellular automata (QCA) consists of nano-scale cells and demands very low power consumption so that it is one of the alternative technologies that can overcome the limits of scaling CMOS technologies. Typical BCD-EXCESS 3 code converters using QCA have not considered the scalability so that the architectures are not suitable for a large scale circuit design. Thus, we design a BCD-EXCESS 3 code converter with scalability using QCADesigner and verify the effectiveness by simulation. Our structure have reduced 32 gates and 7% of garbage space rate compare with typical URG BCD-EXCESS 3 code converter. Also, 1 clock is only needed for circuit expansion of our structure though typical QCA BCD-EXCESS 3 code converter demands 7 clocks.

• Journal of IKEEE
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• v.15 no.1
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• pp.37-42
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• 2011

In this paper, the high-voltage novel devices have been fabricated by 0.35 um BCD (Bipolar-CMOS-DMOS) process. Electrical characteristics of 20 V level BJT device, 30/60 V HV-CMOS, and 40/60 V LDMOS are analyzed. Also, the vertical/lateral BJT with the high-current gain and LIGBT with the high-voltage are proposed. In the experimental results, vertical/lateral BJT has breakdown voltage of 15 V and current gain of 100. The proposed LIGBT with the high-voltage has breakdown voltage of 195 V, threshold voltage of 1.5 V, and Vce, sat of 1.65 V.

• Journal of IKEEE
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• v.20 no.4
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• pp.428-431
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• 2016

Power semiconductor devices had been producted with bipolar only processes, but Bipolar-CMOS-DMOS(BCD) processes have been adapted recently to fabricate these devices since most foundry companies have provided BCD processes instead of Bipolar only processes. In this study, Regulator and OP Amp are used as most popular design IPs and BCD processes for the designing are converted from bipolar only processes. Power Switching Sensor(PSS) ICs are designed specifically and fabricated on a silicon chip. The operation results of the packaged chip show the good matching with test results of the simulation.

• Journal of Advanced Navigation Technology
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• v.17 no.6
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• pp.700-704
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• 2013

Quantum-dot cellular automata(QCA) is a new technology and it is an one of the alternative high performance over existing complementary metal-oxide semi-conductor(CMOS). QCA is nanoscale device and ultra-low power consumption compared with transistor-based technologies, and various circuits using QCA technology have been proposed. Binary-coded decimal(BCD), which represents decimal digits in binary, is mainly used in electronic circuits and Microprocessor, and it is comfortable in conversion operation but many data loss. In this paper, we present an BCD-EXCESS 3 Code converter which can be efficiently used for subtraction and half adjust. The proposed scheme has efficiently designed considering space and time complexities and minimization of noise, and it has been simulated and confirmed.

• Proceedings of the IEEK Conference
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• 1998.06a
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• pp.477-480
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• 1998

본 연구에서는 정보통신 시스템 민 전자 제어 시스템, atuomobile 저자부문의 핵심부품으로 사용가능한 HV-IC영 BCD 공정 및 소자를 설계하였다. 60V 이상의 bipolr, 20V급 HV-CMOS 소자기술을 one-chip에 구현하는 고내압 BCD 소자구조를 제안, 설계하고 시뮬레이션을 통하여 고안된 소자구조를 검증하여 최적화된 공정 및 소자 변수를 추출하였다.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.28 no.6
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• pp.371-374
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• 2015

This paper suggests a high performance lateral super barrier rectifier (Lateral SBR) device which has the advantages of both Schottky diode and pn junction, that is, low forward voltage and low leakage current, respectively. Advantage of the proposed lateral SBR is that it can be easily implemented and integrated in current BCD platform. As a result of simulation using TCAD, BVdss = 48 V, $V_F=0.38V$ @ $I_F=35mA$, T_j = $150^{\circ}C$ were obtained with very low leakage current characteristic of 3.25 uA.

• Annual Conference on Human and Language Technology
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• 2018.10a
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• pp.3-7
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• 2018

본 연구진은 모든 형태소 분석 후보에 적절한 의존관계를 부여하여 구문분석 트리 후보를 순위화하여 제시하는 한국어 구문 분석 시스템 BCD-KL-Parser를 개발하고 있다. 이 시스템의 최종목표는 형태소 분석후보와 구문분석 트리 후보를 줄여나감으로써, 구문분석의 정확도와 실행 속도를 높이는 것이다. 본 논문에서 소개하는 BCD-KL-Parser에서는 형태적 중의성 해소규칙을 정의하여 형태소 분석후보의 수를 줄이고, 용언의 하위범주화 정보와 선택제약 정보 그리고 의존관계 제약규칙을 정의하여 구문분석 트리 후보의 수를 최소화할 수 있었다. 그 결과 '21세기 세종계획 구문분석 말뭉치'에서 무작위로 추출한 2,167문장에 대하여 UAS 92.27%를 달성할 수 있었다.

• The Transactions of The Korean Institute of Electrical Engineers
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• v.58 no.1
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• pp.23-27
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• 2009

The joint dispatch of regional electricity markets can improve the overall economic efficiency of interconnected markets by increasing the combined social welfare of the interconnected markets. This paper presents a new decentralized optimization technique based on Augmented Lagrangian Relaxation (ALR) to perform the joint dispatch of interconnected electricity markets. The Block Coordinate Descent (BCD) technique is applied to decompose the inseparable quadratic term of the augmented Lagrangian equation into individual market optimization problems. The Interior Point/Cutting Plane (IP/CP) method is used to update the Lagrangian multiplier in the decomposed market optimization problem. The numerical example is presented to validate the effectiveness of the proposed decentralized method.