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An Excess-3 Code Carry Lookahead Design for High-Speed Decimal Addition  

최종화 (충북대학교 정보통신공학과)
유영갑 (충북대학교 정보통신공학과)
Publication Information
Journal of the Institute of Electronics Engineers of Korea CI / v.40, no.5, 2003 , pp. 241-249 More about this Journal
Abstract
Carry lookahead(CLA) circuitry of decimal adders is proposed aiming at delay reduction. The truncation error in calculation of monetary interests may accumulate yielding a substantial amount of errors. Binary Coded Decimal(BCD) additions. for example, eliminate the truncation error in a fractional representation of decimal numbers. The proposed BCD carry lookahead scheme is aiming at the speed improvements without any truncation errors in the addition of decimal fractions. The delay estimation of the BCD CLA is demonstrated with improved performance in addition. Further reduction in delay can be achieved introducing non-weighted number system such as the excess-3 code.
Keywords
Decimal; BCD; excess-3 code; carry lookahead; adder;
Citations & Related Records
Times Cited By KSCI : 1  (Citation Analysis)
연도 인용수 순위
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