• Asian Pacific Journal of Cancer Prevention
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• v.16 no.2
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• pp.531-535
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• 2015

Vasculogenic mimicry (VM) refers to the unique ability of highly aggressive tumor cells to mimic the pattern of embryonic vasculogenesis, which was associated with invasion and metastasis. The grape seed proanthocyanidins (GSPs) had attracted much attention as a potential bioactive anti-carcinogenic agent. However, GSPs regulation of VM and its possible mechanisms in a triple-negative breast cancer cells (TNBCs) remain not clear. Therefore, we examined the effect of GSPs on VM information in HCC1937 cell model. In this study, we identified the VM structure via the three-dimensional (3D) matrix in vitro. Cell viability was measured using the CCK8 assay. The effects of GSPs on human triple-negative breast cancer cells (TNBCs) HCC1937 in terms of related proteins of VM information were determined using western blot analysis. In vitro, the tubular networks were found in highly invasive HCC1937 cells but not in the non-invasive MCF-7 cells when plated on matrigel. The number of vascular channels was significantly reduced when cells were exposed in GSPs ($100{\mu}g$/ml) and GSPs ($200{\mu}g/mL$) groups (all p<0.001). Furthermore, we found that treatment with GSPs promoted transition of the mesenchymal state to the epithelial state in HCC1937 cells as well as reducing the expression of Twist1 protein, a master EMT regulator.GSPs has the ability to inhibit VM information by the suppression of Twist1 protein that could be related to the reversal of epithelial-to-mesenchymal (EMT) process. It is firstly concluded that GSPs may be an p otential anti-VM botanical agent for human TNBCs.

• Proceedings of the IEEK Conference
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• 2003.07c
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• pp.2641-2644
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• 2003

Recently, TRAO Taeduk Radio Astronomy Observatory is developing wide-band digital spectrometer for radio astronomy, which will be used as back-end signal processing unit of Dual channel SIS receiver. So in this paper, we performed development of high speed digitizing sampler for the wide-band digital autocorrelator, which can perform sampling and quantization on pseudo-random gaussian noise with the maximum conversion speed of 1.5 Gsps..

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.48 no.4
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• pp.14-23
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• 2011

In this paper, a 7-bit 2GSPS folding/interpolation A/D Converter(ADC) with a Self-Calibrated Vector Generator is proposed. The ADC structure is based on a folding/interpolation architecture whose folding/interpolation rate is 4 and 8, respectively. A cascaded preprocessing block is not only used in order to drive the high input signal frequency, but the resistive interpolation is also used to reduce the power consumption. Based on a novel self-calibrated vector generator, further, offset errors due to device mismatch, parasitic resistors. and parasitic capacitance can be reduced. The chip has been fabricated with a 1.2V 0.13um 1-poly 7-metal CMOS technology. The effective chip area including the calibration circuit is 2.5$mm^2$. SNDR is about 39.49dB when the input frequency is 9MHz at 2GHz sampling frequency. The SNDR is improved by 3dB with the calibration circuit.

• Proceedings of the IEEK Conference
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• 2004.06b
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• pp.537-540
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• 2004

In this paper, CMOS A/D converter with 6bit 2GSPS Nyquist input at 1.8V is designed. In order to obtain the resolution of 6bit and the character of high-speed operation. we present an Interpolation type architecture. In order to overcome the problems of high speed operation further a novel encoder, a circuit for the Reference Fluctuation, an Averaging Resistor and a Track & Hold for the improved SNR are proposed. The proposed Interpolation ADC consists of Track & Holt four resistive ladders with 64 taps, 32 comparators and digital blocks. The proposed ADC is based on 0.18um 1-poly 3-metal N-well CMOS technology, and it consumes 145mW at 1.8V power supply.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.42 no.6 s.336
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• pp.1-8
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• 2005

In this paper, CMOS A/D converter with 6bit 2GSPS Nyquist input at 1.8V is designed. In order to obtain the resolution of 6bit and the character of high-speed operation, we present an Interpolation type architecture. In order to overcome the problems of high speed operation, a novel One-zero Detecting Encoder, a circuit to reduce the Reference Fluctuation, an Averaging Resistor and a Track & Hold, a novel Buffered Reference for the improved SNR are proposed. The proposed ADC is based on 0.18um 1-poly 3-metal N-well CMOS technology, and it consumes 145mW at 1.8V power supply and occupies chip area of 977um $\times$ 1040um. Experimental result show that SNDR is 36.25 dB when sampling frequency is 2GHz and INL/DNL is $\pm$0.5LSB at static performance.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.47 no.3
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• pp.18-27
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• 2010

In this paper, a 1.2V 7-bit 1GSPS A/D converter with offset self-calibration is proposed. The proposed A/D converter structure is based on the folding-interpolation whose folding rate is 2, interpolation rate is 8. Further, for the purpose of improving the chip performance, an offset self-calibration circuit is used. The offset self-calibration circuit reduce the variation of the offset-voltage，due to process mismatch, parasitic resistor, and parasitic capacitance. The chip has been fabricated with a 1.2V 65nm 1-poly 6-metal CMOS technology. The effective chip area is $0.87mm^2$ and the power dissipates about 110mW at 1.2V power supply. The measured SNDR is about 39.1dB when the input frequency is 250MHz at 800MHz sampling frequency. The measured SNDR is 3dB higher than the same circuit without any calibration.

• Asian Pacific Journal of Cancer Prevention
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• v.13 no.2
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• pp.539-543
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• 2012

Background: The results of the Global School Personnel Survey (GSPS) conducted in India in 2009 are compared with 2006 GSPS to assess any change in 2009 on tobacco use and knowledge and attitudes to tobacco use, training and availability of tobacco control teaching material in schools and the existence of school tobacco control policies. Methods: GSPS is a cross sectional survey conducted twice (2006 and 2009) in entire India. A total of 180 schools were surveyed each time. Results: Of the participating school personnel, 2660 in 2006 and 2575 in 2009, about 95% were teachers and the balance administrators. In 2009, compared to 2006 the prevalence of current smoking of cigarettes (19.6% in 2006 and 10.3% in 2009) and bidis (21.5% in 2006 and 13.9% in 2009) was found to be significantly lower; the percentage of teachers receiving training on preventing youth tobacco use has significantly reduced (16.7% in 2006 and 10.1% in 2009); access of teachers to educational materials on tobacco use and how to prevent its use among youth had not increased (34.6% in 2006 and 37.8% in 2009); there was no change in policy prohibiting tobacco use among students and school personnel; however, ever use of any tobacco on school premises was significantly lower (15.6% in 2006 and 9.6% in 2009). Conclusions: The prevalence of current smoking (cigarettes/bidis) among school personnel and use of any tobacco on school premises were significantly decreased in 2009 as compared to 2006. Necessary action should be planned to increase the number of teachers trained and the availability of teaching materials on preventing youth tobacco use in order to have effective prevention of tobacco use among students.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.44 no.11
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• pp.74-81
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• 2007

In this paper, CMOS analog-to-digital converter (ADC) with a 6-bit 1GSPS at 1.8V is described. The architecture of the proposed ADC is based on a folding type ADC using resistive interpolation technique for low power consumption. To reduce the power consumption, a folder reduction technique to decrease the number of folding blocks (NFB) by half of the conventional ones is proposed. further, a novel layout technique is introduced for compact area. With the clock speed of 1GSPS, the ADC achieves an effective resolution bandwidth (ERBW) of 500MHz, while consuming only 60mW of power. The measured INL and DNL were within $\pm$0.5 LSB, $\pm$0.7 LSB, respectively. The measured SNR was 34.1dB, when the Fin=100MHz at Fs=300MHz. The active chip occupies an area of 0.27$mm^2$ in 0.18um CMOS technology.

• Proceedings of the KIEE Conference
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• 2006.10c
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• pp.404-406
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• 2006

본 논문에서는 우주전파를 VLBI 관측시스템으로 관측한 후 고속으로 저장/재생하기 위한 시스템 구축에 관해 소개한다. 한국천문연구원에서는 2001년부터 국내 유일의 VLBI관측 시스템으로써 한국우주전파관측망(Korean VLBI Network; KVN)을 구죽하고 있다. KVN에서는 1Gsps/2bit 우주전파를 샘플링하는 샘플러와 디지털필터로 구성된 자료획득 시스템(Data Acquisition System; DAS)을 갖출 예정이다. 관측된 우주전파는 샘플러와 DAS를 통하여 처리된 데이터를 1Gbps이상의 속도로 기록된다. 본 논문에서는 1Gbps급의 대용량 데이터를 처리할 수 있는 시스템으로써 Mark5B 시스템의 구축과 시스템 구성, VSI-H, 시스템 운용 및 실험결과 등에 대해서 기술하고자 한다.

• JSTS:Journal of Semiconductor Technology and Science
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• v.7 no.1
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• pp.43-50
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• 2007

In a high-speed flash style or a pipelining style analog-to-digital converter (A/D converter), the DC reference fluctuation caused by external noises becomes serious, as the sampling frequency is increased. To reduce the fluctuations in conventional A/D converters, capacitors have been simply used, but the layout area was large. Instead of capacitors, a low-noise and small-size DC reference circuit based on transmission gate (TG) is proposed in this paper. In order to verify the proposed technique, we designed and manufactured a 6-bit 2GSPS CMOS A/D converter. The A/D converter is designed with a 0.18um 1-poly 6-metal n-well CMOS technology, and it consumes 145mW at 1.8V power supply. It occupies the chip area of 977um by 1040um. The measured result shows that SNDR is 36.25 dB and INL/DNL is within 0.5LSB, even though the DC reference fluctuation is serious.