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Design of a 1.2V 7-bit 800MSPS Folding-Interpolation A/D Converter with Offset Self-Calibration  

Kim, Dae-Yun (Department of Semiconductor Science, Dongguk Univ-Seoul)
Moon, Jun-Ho (Department of Semiconductor Science, Dongguk Univ-Seoul)
Song, Min-Kyu (Department of Semiconductor Science, Dongguk Univ-Seoul)
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Abstract
In this paper, a 1.2V 7-bit 1GSPS A/D converter with offset self-calibration is proposed. The proposed A/D converter structure is based on the folding-interpolation whose folding rate is 2, interpolation rate is 8. Further, for the purpose of improving the chip performance, an offset self-calibration circuit is used. The offset self-calibration circuit reduce the variation of the offset-voltage,due to process mismatch, parasitic resistor, and parasitic capacitance. The chip has been fabricated with a 1.2V 65nm 1-poly 6-metal CMOS technology. The effective chip area is $0.87mm^2$ and the power dissipates about 110mW at 1.2V power supply. The measured SNDR is about 39.1dB when the input frequency is 250MHz at 800MHz sampling frequency. The measured SNDR is 3dB higher than the same circuit without any calibration.
Keywords
1GSPS; Folding; Interpolation; A/D converter; self-calibration;
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