• Title/Summary/Keyword: 피드백 전계 효과 트랜지스터

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The hysteresis characteristic of Feedback field-effect transistors with fluctuation of gate oxide and metal gate (게이트 절연막과 게이트 전극물질의 변화에 따른 피드백 전계효과 트랜지스터의 히스테리시스 특성 확인)

  • Lee, Kyungsoo;Woo, Sola;Cho, Jinsun;Kang, Hyungu;Kim, Sangsig
    • Journal of IKEEE
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    • v.22 no.2
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    • pp.488-490
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    • 2018
  • In this study, we propose newly designed feedback field-effect transistors that utilize the positive feedback of charge carriers in single-gated silicon channels to achieve steep switching behaviors. The band diagram, I-V characterisitcs, subthreshold swing, and on/off current ratio are analyzed using a commercial device simulator. To demonstrate the changing characteristics of hysteresis, one of the important features of the feedback field effect transistor, we simulated changing the gate insulating material and the gate metal electrode. The fluctuation in the characteristics changed the $V_{TH}$ of the hysteresis and showed a decrease in width of the hysteresis.

A review of feedback field-effect transistors: operation mechanism and their applications (피드백 전계효과 트랜지스터에 대한 리뷰: 동작 메커니즘과 적용 분야)

  • Kim, Minsuk;Lee, Kyungsoo;Kim, Sangsig
    • Journal of IKEEE
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    • v.22 no.2
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    • pp.499-505
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    • 2018
  • Since feedback field-effect transistors (FBFETs) have ideal switching characteristics resulting from feedback phenomenon caused by electrons and holes in the channel region, the researches about FBFET devices have been proposed and demonstrated worldwide recently. The device operated with novel principle can operate as a switching electronic device. Besides, because the hysteresis characteristics of the device by accumulated electrons and holes in channel region can be also utilized for memory applications, its application range is wide. In this paper, we cover various device structures of FBFET proposed until now and their operation mechanism, and then look into their applicable fields.

Investigation of the electrical characteristics of monolithic 3-dimensional static random access memory consisting of feedback field-effect transistor (피드백 전계 효과 트랜지스터로 구성된 모놀리식 3차원 정적 랜덤 액세스 메모리 특성 조사)

  • Oh, Jong Hyeok;Yu, Yun Seop
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2022.10a
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    • pp.115-117
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    • 2022
  • The electrical characteristics of the monolithic 3-dimensional static random access memory consisting of a feedback field-effect transistor (M3D-SRAM-FBFET) was investigated using technology computer-aided design (TCAD). The N-type FBFET and N-type MOSFET are designed with fully depleted silicon on insulator (FDSOI), and those are located at bottom and top tiers, respectively. For the M3D-SRAM-FBFET, as the supply voltage decreased from 1.9 V to 1.6 V, the reading on-current decreased approximately 10 times.

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Macro Modeling of a Feedback Field-effect Transistor (피드백 전계 효과 트랜지스터의 메크로 모델링 연구)

  • Oh, Jong Hyeok;Yu, Yun Seop
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2021.10a
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    • pp.634-636
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    • 2021
  • In this study, we studied the macro-modeling of an feedback field-effect transistor (FBFET) using SPICE simulation. The previously presented macro-model of the FBFET is consisting of two circuits. one is charge integration circuit, and the other is current generation circuit. The previous current generation circuit has problem that can't predict performance accurately of the circuits, due to implementing only IDS-VGS characteristics. To solve this problem, we presents a model that can implement not only IDS-VGS characteristics but alos IDS-VDS characteristics by adding the diode in the current generation circuit.

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Quasi-nonvolatile Memory Characteristics of Silicon Nanosheet Feedback Field-effect Transistors (실리콘 나노시트 피드백 전계효과 트랜지스터의 준비휘발성 메모리 특성 연구)

  • Seungho Ryu;Hyojoo Heo;Kyoungah Cho;Sangsig Kim
    • Journal of IKEEE
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    • v.27 no.4
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    • pp.386-390
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    • 2023
  • In this study, we examined the quasi-nonvolatile memory characteristics of silicon nanosheet (SiNS) feedback field-effect transistors (FBFETs) fabricated using a complementary metal-oxide-semiconductor process. The SiNS channel layers fabricated by photoresist overexposure method had a width of approximately 180 nm and a height of 70 nm. The SiNS FBFETs operated in a positive feedback loop mechanism and exhibited an extremely low subthreshold swing of 1.1 mV/dec and a high ON/OFF current ratio of 2.4×107. Moreover, SiNS FBFETs represented long retention time of 50 seconds, indicating the quasi-nonvolatile memory characteristics.

Effects of Annealing on Electrical Characteristics of Double-Gated Silicon Nanosheet Feedback Field-Effect Transistors (더블게이트 실리콘 나노시트 피드백 전계효과 트랜지스터의 전기적 특성에 미치는 열처리 효과)

  • Hyojoo Heo;Yunwoo Shin;Jaemin Son;Seungho Ryu;Kyoungah Cho;Sangsig Kim
    • Journal of IKEEE
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    • v.27 no.4
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    • pp.418-424
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    • 2023
  • In this study, we examined the effects of annealing on electrical characteristics of double-gated silicon nanosheet (SiNS) feedback field effect transistors (FBFETs). When bias stresses were applied for 1000 s, the double-gated SiNS FBFETs were more affected by positive bias stresses than negative bias stresses regardless of the channel mode owing to the increase of interface traps caused by electrons in the inversion layers. After annealing at 300 ℃ for 10 mins, the devices were completely recovered to their original properties, and the characteristics did not change anymore when bias stresses were applied again for 1000 s.

Effect of Channel Length Variation on Memory Window Characteristics of single-gated feedback field-effect transistors (채널 길이의 변화에 따른 단일 게이트 피드백 전계효과 트랜지스터의 메모리 윈도우 특성)

  • Cho, Jinsun;Kim, Minsuk;Woo, Sola;Kang, Hyungu;Kim, Sangsig
    • Journal of IKEEE
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    • v.21 no.3
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    • pp.284-287
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    • 2017
  • In this study, we examined the simulated electrical characteristics of single-gated feedback field effect transistors (FBFETs) and the influence of channel length variation of the memory window characteristics through the 3D device simulation. The simulations were carried out for various channel lengths from 50 nm to 100 nm. The FBFETs exhibited zero SS(< 1 mV/dec) and a current $I_{on}/I_{off}$ ratio${\sim}1.27{\times}10^{10}$. In addition, the memory windows were 0.31 V for 50 nm-channel-length devices while no memory windows were observed for 100 nm-channel-length devices.