Proceedings of the International Microelectronics And Packaging Society Conference (한국마이크로전자및패키징학회:학술대회논문집)
The Korean Microelectronics and Packaging Society
- Semi Annual
Domain
- Electricity/Electronics > Electric and Electronic Components
2002.05a
-
It is very important to foresee the main stream of technology development in the future. Packaging related manufacturers in equipment and materials focused their strength on products sharing big portion of world markets. As a result, domestic supply sources for packaging materials and equipment has been increased, but the manufacturer's capital and manpower is so limited to develop high technology machinery and high functional materials. The current status of packaging infrastructures in Korea is reviewed statistically. The hot issues in packaging arena are now in wafer level packaging, 3D packaging, and ultra-thin packaging. In addition, the recent advancement in microelectronics packaging technology is also covered.
-
In ceramic systems, many components including embedded passives and TRL(transmission line) are used for composition of 3-dimensional circuit. So the exact analysis on this components, As for the TRL's, material properties including electrical conductivity of metal, loss factor and effective dielectric constant of dielectric material and geometrical factors like roughness of surface, vias, dimension of stripline structure have a large effect on the charactersistics of transmission lines. In this research, of effect of material and geometrical factors on the characteristics of stripline structure is analyzed and quantified by simulation and measurement.
-
MEMS공정을 이용하여 폴리실리콘의 piezoresistivity를 이용한 스트레인 센서어레이를 제작하였고, 이 센서 어레이를 flexible substrate에 패키징하는 공정을 개발하였다. 실리콘 웨이퍼에 표면 가공(surface micromachining)된 센서는 폴리이미드 코팅, release-etch 방법을 통해 웨이퍼로부터 분리되어 폴리이미드를 기판으로 하는 flexible sensor array module을 완성할 수 있었다. 공정은 희생층과 절연층을 증착하고 폴리실리콘 0.5
$\mu\textrm{m}$ 을 증착, 도핑 및 패터닝하여 센서 어레이를 구성하였다. 이 센서어레이를 flexible substrate에 패키징 하기 위해서 폴리이미드를 코팅하여 15$\mu\textrm{m}$ 의 막을 구성하였고, 100%$O_2$ RIE를 이용한 선택적 식각 방법으로 via hole을 구성하였다. 이후 전기도금을 통해 회로를 구성하여 1단계 패키징(die to chip carrier)과 2단계 패키징(chip to substrate)을 웨이퍼 레벨에서 완성하였다. 희생층을 제거함으로서 웨이퍼로부터 센서어레이 모듈을 분리하였다. 제작되어진 센서 모듈은 임의의 곡면에 실장이 가능하도록 충분한 flexibility를 얻을 수 있었다. -
The bottom-leaded plastic(BLP) packages have attracted substantial attention since its appearance in the electronic industry. Since the solder materials have relatively low creep resistance and are susceptible to low cycle fatigue, the life of the solder joints under the thermal loading is a critical issue for the reliability The represent study established a finite element model for the analysis of the solder joint reliability under thermal cyclic loading. An elasto-plastic constitutive relation was adopted for solder materials in the modeling and analysis. A 28-pin BLP assembly is modeled to investigate the effects of various epoxy molding compound, leadframe materials on solder joint reliability. The fatigue life of solder joint is estimated by the modified Coffin-Hanson equation. The two coefficients in the equation are also determined. A new design for lead is also evaluated by using finite element analysis. Parametric studies have been conducted to investigate the dependence of solder joint fatigue life on various package materials.
-
A study on the interfacial reactions between electroless Ni-P UBM and 95.5Sn-4.0Ag-0.5Cu solder bumpEven though electroless Hi and Sn-Ag-Cu solder are widely used materials in electronic packaging applications, interfacial reactions of the ternary Ni-Cu~Sn system have not been known well because of their complexity. Because the growth of intermetallics at the interface affects reliability of solder joint, the intermetallics in Ni-Cu-Sn system should be identified, and their growth should be investigated. Therefore, in present study, interfacial reactions between electroless Ni UB7f and 95.5Sn-4.0Ag-0.5Cu alloy were investigated focusing on morphology of the IMCs, thermodynamics, and growth kinetics. The IMCs that appear during a reflow and an aging are different each other. In early stage of a reflow, ternary IMC whose composition is Ni
$_{22}$ Cu$_{29}$ Sn$_{49}$ forms firstly. Due to the lack of Cu diffusion, Ni$_{34}$ Cu$_{6}$ Sn$_{60}$ phase begins growing in a further reflow. Finally, the Ni$_{22}$ Cu$_{29}$ Sn$_{49}$ IMC grows abnormally and spalls into the molten solder. The transition of the IMCs from Ni$_{22}$ Cu$_{29}$ Sn$_{49}$ to Ni$_{34}$ Cu$_{6}$ Sn$_{60}$ was observed at a specific temperature. From the measurement of activation energy of each IMC, growth kinetics was discussed. In contrast to the reflow, three kinds of IMCs (Ni$_{22}$ Cu$_{29}$ Sn$_{49}$ , Ni$_{20}$ Cu$_{28}$ Au$_{5}$ , and Ni$_{34}$ Cu$_{6}$ Sn$_{60}$ ) were observed in order during an aging. All of the IMCs were well attached on UBM. Au in the quaternary IMC, which originates from immersion Au plating, prevents abnormal growth and separation of the IMC. Growth of each IMC is very dependent to the aging temperature because of its high activation energy. Besides the IMCs at the interface, plate-like Ag3Sn IMC grows as solder bump size inside solder bump. The abnormally grown Ni$_{22}$ Cu$_{29}$ Sn$_{49}$ and Ag$_3$ Sn IMCs can be origins of brittle failure.failure. -
We establish a visible light emission from porous polycrystalline silicon nano structure(PPNS). The PPNS layer are formed on heavily doped n-type Si substrate. 2um thickness of undoped polycrystalline silicon deposited using LPCVD (Low Pressure Chemical Vapor Deposition) anodized in a HF: ethanol(=1:1) as functions of anodizing conditions. And then a PPNS layer thermally oxidized for 1 hr at
$900 ^{\circ}C$ . Subsequently, thin metal Au as a top electrode deposited onto the PPNS surface by E-beam evaporator and, in order to establish ohmic contact, an thermally evaporated Al was deposited on the back side of a Si-substrate. When the top electrode biased at +6V, the electron emission observed in a PPNS which caused by field-induces electron emission through the top metal. Among the PPNSs as functions of anodization conditions, the PPNS anodized at a current density of$10mA/cm^2$ for 20 sec has a lower turn-on voltage and a higher emission current. Furthermore, the behavior of electron emission is uniformly maintained. -
BGA(Ball Grid Array) 패키지의 솔더볼 패드 중의 하나인 Au/Ni-Co/Cu 금속층 위에 Bi가 첨가된 Sn-3.5Ag-
$\chi$ Bi 솔더볼을 리플로우시켰다. 리플로우한 후 130$^{\circ}C$ 에서 열처리함에 따른 계면상 및 솔더 내부의 상변화를 관찰하였다. 계면에는 (Ni,Co)$_3$ Sn$_4$ 외에 (Au,Ni,Co,Bi)Sn$_4$ 가 생성되었음을 관찰할 수 있었고, 솔더 내부에는 (Au,Ni,Co,Bi)SH$_4$ , Ag$_3$ Sn, Bi 상이 혼재되어 있었다. Nano-indentation에 의한 경도 측정 결과, Bi 함량 증가에 따라 경도는 증가하였으나, 볼전단(Ball Shear) 테스트 결과는 Bi가 증가됨에 따라 오히려 볼전단 강도값이 감소하였다. 이는 파면 검사 결과, 파괴 경로가 주로 계면의 금속간 화합물과 솔더 사이에서 진행함에 기인한 것이다. 솔더 내부의 파괴 경로를 가진 2.5Bi가 가장 우수한 볼전단 강도값을 나타내었는데, 이는 솔더내의 Bi의 고용강화에 기인한 것으로 보인다. -
This paper was investigated the lead free solder characteristics by P mass percentage chang e. Tension test, wetting balance test, spread test, and analysis of intermetallic compound after isothermal aging of Sn-2.5Ag-0.7Cu-0.005P, Sn-2.5Ag-0.7Cu-0.01P, Sn-2.5Ag-0.7Cu-0.02P, Sn-0.7Cu-0.005P were performed for estimation. By adding P on the solder alloys, it was showe d improvement of tensile strength, reduction of intermetallic compound growth and reduction of oxidization of fusible solder under wave soldering processes. After comparing solder alloy containing P with tin lead eutectic solder alloy, p containing solder alloys showed much better solderability than eutectic solder alloys.
-
The adhesion of electroless plated Ni layer on Al/Si substrates has been investigated. The zincating treatment was conducted with a conventional method and a modified method. In a modified method, ultrasonic agitation was applied during zincating. Adhesion strength was evaluated by a pull-off test. The ultrasonic agitation during zincating increased the nucleation density of Zn particles and refined Zn particle size. the adhesion strength of electroless Ni layer deposited on the modified zincated surface was higher than that on the conventionally zincated surface. the improvement of adhesion was attributed to the fine and dense Zn particles.
-
In this paper, several methods to predict the solder joint shape are studied. Although there are various methods to predict the solder joint shape, such as truncated sphere method, force-bal tranced analytical solution, and energy-based methods like surface evolver developed by Ken Brakke, we calculate solder joint shape of
$\mu$ BGA by two solder joint shape prediction methods(truncated sphere method and surface evolver) and then compare results of each method. The results in dicate that two methods can accurately predict the solder joint shape in an accurate range. After that, we calculate reliability solder joint shape under thermal cycle test by FEA program ANSYS. As a result, it could be found that optimal solder joint shape calculated by solder joint prediction method has best reliability in thermal cycle test. -
이동통신기기 등의 고주파용 LTCC(Low Temperature Co-fired Ceramic) LC filter의 소결결에 있어 기존의 소결공정인 전기로 소결공정과 microwave를 이용한 소결공정을 이용하여 소결하였을때 LC filter의 수축율과 무게감소, 그에 따른 밀도의 변화, SEM을 이용한 표면형상 분석을 통해 급속가열을 통한 공정시간의 단축, 낮은 에너지 소비로 인한 제조단가의 절감, 균일한 가열로 인한 소결온도의 저하 등의 장점을 갖는 microwave sintering을 적용할 수 있는 가능성을 제시하였다.
-
This article presents that the affecting factors to solderability and initial reliability. It was discussed that effect of the solder ball hardness and composition on the reliability of solder joints. In this study, lead free solder alloys with compositions of Sn-Cu, Sn-Ag, Sn-Ag-Cu, Sn-Ag-Cu-Bi were applied to the
$\muBGA$ packages. As a result of experiments, the high degree of hardness with the displacement of 0.22mm was obtained Sn-2.0Ag-0.7Cu-3.0Bi. The shear strength of lead free solder was higher than of Sn-37Pb solder, and it was increased about 150% in Sn-2.0Ag-0.7Cu-3.0Bi. -
Solder leaching resistance of the metal electrode is an important factor with regard to adhesion properties of ceramic substrate. In the Low Temperature Co-fired Ceramics (LTCC), Ag-Pd or Ag-Pt pastes are used instead of pure Ag paste to prevent leaching. Solder leaching behavior of the Ag-Pd paste in relation to LTCC raw material powder size was investigated. First fabrication of LTCC green tape with different particle size was done. LTCC substrates with Ag-Pd electrode were prepared using conventional multilayer ceramic process. Dipping test was performed to test solder leaching behavior of the electrode. Ag-Pd electrode on LTCC substrate with smaller particle size achieved higher solder leaching resistance.
-
A new LTCC material in the
$PbWO_4-TiO_2-B_2O_3-CuO$ system was developed. The developed material can be sintered at$850^{\circ}C$ and its dielectric properties are$\varepsilon_r=20-25, Q\timesf_o=30000~50000GHz$ , and$\tau_f=0.2~30ppm/^{\circ}C$ , depending on the components moi ratio. Due to its low sintering temperature and microwave dielectric properties, the developed material can be used as a LTCC substrate for fabrication of multilayered microwave communication module set. In present study, using this material, tape casting condition was established. With this processing condition, a T-resonator was fabricated and its electrical properties were examined. Also, a 2-Pole band pass filter was fabricated and its frequency characteristics were compared with simulation results. -
There are continuous efforts in the electronics industry to a reduced electronic package size. Reducing the size of electronic packages can be achieved by a variety of means, and for ball grid array(BGA) packages an effective method is to decrease the pitch between the individual balls. Chip scale package(CSP) and BGA are now one of the major package types. However, a reduced package size has the negative effect of reducing board-level reliability. The reliability concern is for the different thermal expansion rates of the two-substrate materials and how that coefficient CTE mismatch creates added stress to the BGA solder joint when thermal cycled. The point of thermal fatigue in a solder joint is an important factor of BGA packages and knowing at how many thermal cycles can be ran before failure in the solder BGA joint is a must for designing a reliable BGA package. Reliability of the package was one of main issues and underfill was required to improve board-level reliability. By filling between die and substrate, the underfill could enhance the reliability of the device. The effect of underfill on various thermomechanical reliability issues in
$\mu$ BGA packages is studied in this paper. -
폴리머/세라믹 복합체는 내장형 캐패시터(embedded capacitor)의 유전 재료로 많은 관심을 불러 일으키고 있다. 본 연구는 BaTiO
$_3$ 분말의 크기와 함량이 에폭시/BaTiO$_3$ 복합체 캐패시터의 유전 상수와 누설전류에 미치는 영향에 대해 살펴보고 이에 대해 고찰하고자 하였다. BaTiO$_3$ 분말이 67vo1% 함유된 Epoxy/BaTiO$_3$ composite 필름의 유전상수는 전반적으로 사용한 BaTiO$_3$ 분말의 크기가 커짐에 따라 증가하였다. 이것은 입자의 크기가 증가함에 따른 입자의 유전상수의 증가 때문이며 XRD 분석을 통해 입자의 크기가 증가함에 따라 tetragonality가 증가함을 확인하였다. 복합체 필름의 누설전류도 또한 사용한 입자의 크기가 커짐에 따라 증가하였으며 이는 분말의 크기가 증가함에 따라 단위길이 당 입자의 수가 감소하는 것으로, 단위 길이 당 입자의 수가 감소하여 전류의 흐름을 방해하는 입자/폴리머/입자 계면의 수가 감소하기 때문이다. 분말의 함량에 따른 유전상수는 unimodal과 bimodal의 경우 각각 73vo1%와 80vo1%에서 최대 값을 나타냈으며 그 이상에서는 감소하는 것이 관찰되었는데 이는 과량의 분말이 조밀 충전을 깨고 필름의 밀도를 낮추기 때문이었다. 누설전류의 경우 unimodal과 bimodal 각각에 대해 73vo1%와 80vo1%에서 급격한 증가를 관찰 할 수 있었으며 이는 percolation 현상의 발생에 의해 입자와 입자간에 접촉이 이루어져 BaTiO$_3$ 분말을 따라 전류가 잘 흐를 수 있는 conduction path가 형성 되기 때문이다. -
The Study on the Fabrication Process and the Electromagnetic Properties of YIG ferrites for Isolator본 연구에서는 Ca, In, V, Al을 첨가 원소로 사용한 YIG 페라이트 분말을 분무건조기로 준구형 과립으로 만들어 일반적인 세라믹 제조 공정 방법으로 다결정 테를 제조하였고, 소결온도와 첨가원소의 조성비에 따른 YIG 페라이트의 기본물성과 전자기적 특성 변화를 조사하였다. 제조된 YIG 페라이트에 대한 기본 물성과 자기 특성을 밀도측정기, XRD, SEM, VSM, Network Analyzer 등을 이용하여 측정 분석하였다.
$Y_{2.1}$ C$a_{0.9}$ F$e_{4.4}$ $V_{0.5}$ I$n_{0.05}$ A$l_{0.05}$ $O_{12}$ 조성의 YIG 페라이트에 대한 전자기적 특성 측정 결과 13$50^{\circ}C$ 에서 소결한 YIG 페라이트에서 우수한 삽입손실 값과 Isolation 값을 나타내였으며 이론밀도의 92%의 높은 밀도값을 가지며 높은 포화자화(4$\pi$ Ms) 값을 지닌 우수한 전자기적 특성을 나타내었다.내었다.내었다. -
The cure and rheological behavior of Diglycidyl ether of bisphenol F, catalyzed by four kinds of imidazoles and a Nadic methyl anhydride curing agent were studied using a differential scanning calorimeter (DSC) and rheometer. The isothermal traces were employed to analyze cure reaction. The DGEBF/anhydride conversion profiles showed autocatalyzed reaction characterized by maximum conversion rate at 20~40 % of the reaction. The rate constants obtained from isothermal test showed temperature dependance, but reaction order did not. The order of reaction (m+n) was calculated to be close to 3. The measurements of viscosity and relation time in the presence of inorganic fillers were carried out at different isothermal curing temperatures. The viscosity and gelation time increased with filler content at the same isothermal temperature.
-
본 연구에서는 탄소나노튜브를 직류 바이어스가 인가된 유도결합형 플라즈마 열선 화학기상증착 장치를 이용하여 58
$0^{\circ}C$ 이하의 저온에서 유리기판의 변형 없이 수직 배향 시켰다. 탄소나노튜브의 성장을 위해 강화유리기판 위에 전도층으로 Cr을 증착하였고, 그 위에 촉매 층으로 Ni을 순차적으로 RF magnetron cputtering 장치를 이용하여 증착 시켰다. 성장 시 탄소나노튜브의 저온에서의 좋은 특성을 위해 높은 온도에서의 열분해를 목적으로 텅스텐 필라멘트를 이용하였으며, 수직 배향 시키기 위해서 직류 바이어스를 이용하였다. 성장된 탄소나노튜브는 수직적으로 잘 배향 되었으며, 저온에서 좋은 특성을 보였다. 탄소나노튜브의 특성화에는 SEM, TEM을 관찰하였으며, Raman spectroscopy를 이용하여 흑연화도를 측정하였고, 전계방츨 특성은 전류 전압 특성곡선과 Fowler-Nordheim plots를 이용하였다. -
본 연구에서는 칩인덕터 코어 소재로 사용되는 (NiCuZn)-ferrite를 습식합성법을 이용하여 나노크기의 초미세 분말을 합성하였으며, 합성된 (ZiCuZn)-ferrite 의 제조공정 및 전파기적 특성에 관하여 고찰하였다. 조성은 (N
$i_{0.4-x}$ C$u_{x}$ Z$n_{0.6}$ )$_{1+w}$ (F$e_2$ $O_4$ )$_{1-w}$ 에서 x의 값을 0.05~0.25 범위로 변화시켰으며, w 값은 0.03으로 고정하였다. 소결은 8$50^{\circ}C$ 에서 9$50^{\circ}C$ 의 범위에서 진행하였다. 나노크기의(NiCuZn)-ferrite를 사용함으로서 시약급 원료로 제조된 것보다 소결온도를 낮출 수 있었고, 밀도가 높은 페라이트 소결체를 얻을 수 있었다. 또한 초투자율, 품질계수 등 전자기적 특성이 우수하게 나타났다. 그 밖에 습식합성법으로 합성한 (NiCuZn)-ferrite 의 결정성, 미세구조 등을 XRD, SEM 을 이용하여 고찰하였다.하였다.다. -
This study demonstrated the feasibility of using tape-casting followed by sintering as a low-cost alternative for coating glass-ceramic or glass film on a metal substrate. The process has been successfully used to fabricate a glass-on-stainless steel and a glass-ceramic-on-molybdenum electrostatic chuck(ESC) with the insulating layer thickness about
$150{\mu}{\textrm}{m}$ . Electrical resistivity data of the coaling were obtained between room temperature and 55$0^{\circ}C$ ; although the resistivity values dropped rapidly with increasing temperature in both coatings, the glass-ceramic still retained a high value of$10^{10}$ ohm-cm at$500^{\circ}C$ . Clamping pressure measurements were done using a mechanical apparatus equipped with a load-cell at temperatures up to$350^{\circ}C$ and applied voltages up to 600V; the clamping behavior of all ESCs generally followed the voltage-squared curve as predicted by theory. Based on these results, we believe that we have a viable technology for manufacturing ESCs for use in reactive-ion etch systems. -
B
$i_{3.3}$ L$a_{0.7}$ $Ti_{3}$ $O_{12}$ (BLT) 강유전체 박막을 Pt/Ti/$SiO_2$ /Si 기판위에 졸-겔법 (sol-gel method) 으로 스핀코팅하여 Metal-Ferroelectric-Metal(MFM) 구조의 커패시터를 형성하였다. BLT 박막의 결정성은 후속열처리 온도가 증가할수록 향상되었으며$R_{근}$ 값은 as~coated된 BLT 박막의 경우 3.8$\AA$ 를 나타내었으나 열처리 온도를$700^{\circ}C$ 로 증가한 경우 12.9$\AA$ 으로 거칠은 표면형상으로 변화되었다.$650^{\circ}C$ 로 열처리된 BLT 박막의 잔류분극 2Pr ($\pm$ ($P^{*}$ -$P^{ ^}$ ))값은 5V 인가전압에서 약 29.1$\mu$ C/$cm^2$ 을 나타내었다. 또한$10^{10}$ 스위칭 cycles 가지 분극 스위칭을 반복한 후에도 뚜렷한 잔류분극의 변화를 발견할 수 없어서 우수한 피로특성을 나타내었다. 3V 전압에서 BLT 박막의 누설전류는 약 2.2$\times$ $10^{-8}$ A/$cm^2$ 를 나타내었다.내었다.었다. -
본 연구는 Ag와 Ce이 함유된 유리를 용융법에 의해 제조하였으며, 355nm Nd:YAG 펄스 레이저를 조사하였을 때의 광학적 특성과 열처리과정에서 발생하는 결정화의 변화과정에 대해 평가하였다. Ce이 함유된 유리는 환원 분위기에서 제조되었으며, Optical Absorption을 통하여 Ce
$^{3+}$ 이온이 존재하는 유리의 흡수대역을 관찰하고자 하였다. Photo Luminescence(PL) 측정을 통해 Ce$^{3+}$ 이 존재하고 있음을 확인하였으며, Ce$^{3+}$ 이온의 5d$\longrightarrow$ 4f 전이를 관찰하였다. 이와같이 Ce$^{3+}$ 가 함유된 유리는 레이저를 조사하였을 경우 PL의 강도가 저하됨을 확인하였다. 열처리과정에서 발생하는 결정화현상을 고찰하기 위해 열분석을 실시하였으며, 레이저조사된 유리에서 최대결정화온도가 감소함을 관찰하였다. -
Copper thin films are prepared by a chemical vapor deposition technology for multi-level metallzations in ULSI fabrication. The copper films were deposited on TiN/Si substrates in helium atmosphere with the substrate temperature between
$120^{\circ}C$ and$300^{\circ}C$ . In order to get more reliable metallizations, effects on the post-annealing treatment to the electrical properties of the copper films have been investigated. The Cu films were annealed at the$5\times$10^{-6}$ Torr vacuum condition, and the electrical resistivity and the nano-structures were measured for the Cu films. The electrical resistivity of Cu films shown to be reduced by the post-annealing. The electrical resistivity of 2.2$\mu$ $\Omega$ .cm was obtained for the sample deposited at the substrate temperature of$180^{\circ}C$ after vacuum annealed at$300^{\circ}C$ . The resistivity variations of the films was not exactly matched with the size of the nato-structures of the copper grains, but more depended on the deposition temperature of the copper films. -
With the contact pad consisted of
$0.5{\mu}{\textrm}{m}$ $Au/5{\mu}{\textrm}{m}$ Ni/Cu layers on a conventional ball grid array(BGA) substrate, metallurgical reaction properties between the pad and In-15(wt.%)Pb-5Ag solder alloy were studied after reflow and solid aging. In as-reflow condition, thin AuIn$_2$ or Ni$_{28}$ In$_{72}$ intermetallic layer was formed at the solder/pad interface according to reflow time. Dissolution of the Au layer into the molten solder was remarkably limited in comparison with eutectic Sn-37Pb alloy. After solid aging of 300 hrs, thickness of In-Ni layer increased to about$2{\mu}{\textrm}{m}$ in the both as-reflow case. It was observed that In atoms diffuse through the AuIn$_2$ phase to react with underlaying Ni layer. The metallurgical reaction properties between In-l5Pb-7Ag alloy and Au/Ni surface finish were analysed to result in suppression of Au-embrittlement in the solder joints. -
Sn-Cu-Ni계 솔더 합금에 소량의 Bi와 In을 첨가하여 새로운 무연솔더 합금 개발을 진행하였다. Sn-0.7%(Cu+Ni)에 2~5% Bi, 2~10% In을 첨가하여 각각의 열적, 전기적, 기계적 특성을 평가하였다. 솔더합금의 융점은 200~222
$^{\circ}C$ , 응고온도범위는 20~37$^{\circ}C$ 로 중.고온계 솔더로서 적용이 가능하다. 실험 조성별 솔더 합금중 실용적, 경제적인 면을 고려하여 Sn-0.7%(Cu+Ni)-3.5%Bi-2%In이 최적의 합금조성으로 판단된다. 이 합금은 융점이 22$0^{\circ}C$ 정도이며 응고범위는$25^{\circ}C$ , 강도 면에서는 타 합금에 비해 상당히 우수한 값을 나타내었으며 연신율은 비교적 낮은 값을 나타내었다. 다른 기계적, 전기적 특성은 타 솔더 합금과 유사하거나 우수한 편이었으며 젖음특성도 양호하였다. -
The tribological properties and van der Waals attractive forces and the thermal stability of films are very important characteristics of highly hydrophobic fluorocarbon (FC) films for the long-term reliability of nano system. The effect of thermal annealing on films and van der Waals attractive forces and friction coefficient of films have been investigate d in this study. It was coated Al wafer which was treated O2 and Ar that ocatfluorocyclobutane (
$C_4_{8}$ ) and Ar were supplied to the CVD chamber in the ratio of 2:3 for deposition of FC Films. Static contact angle and dynamic contact angle were used to characterize FC films. Thickness of films was measured by variable angle spectroscopy ellipsometer (VASE). Nanotribological data was got by atomic force microscopy (AFM) to measure roughness, lateral force microscopy (LFM) to measure friction force, and force vs. distance (FD) curve to evaluate adhesion force. FC films were cured in N2 and vacuum. The film showed the slight changes in its properties after 3 hr annealing. FTIR ATR studies showed the decrease of C-F peak intensity in the spectra as the annealing time increased. A significant decrease of film thickness has been observed. The friction force of Al surface was at least thirty times higher than ones with FC films. The adhesive force of bare Al was greater than 100 nN. After deposit FC films adhesive force was decreased to 40 nN. The adhesive force of films was decreased down to 10 nN after 24 hr annealing. During 24 hr annealing in$N_2$ and vacuum at$100^{\circ}C$ film properties were not changed so much. -
$HfO_2$ films were grown on Si substrate in the temperature range$250~550^{\circ}C$ using metal organic chemical vapor deposition (MOCVD) technique for a gate dielectric. Hafnium tart-butoxide and Oxygen gas were used as precursors and N2 was used as carrier gas. Impurity distribution and film structure(including interfacial layer) were studied at the deposition temperature range between 25$0^{\circ}C$ and$550^{\circ}C$ . The growth rate and impurty distribution decreased with increasing temperature. The electrical properties of$HfO_2$ were investigated with C-V, 1-V method and showed it has a good properties as a gate dielectric. -
CSP(Chip Size Packaging) SAW Filter Package에 대해서, 유한요소해석(Finite Element Analysis) 컴퓨터 Simulation 프로그램인 ANSYS를 이용하여 Package의 온도 분포를 해석하였다. 신뢰성(reliability) Test 조건에서 Transient Thermal Simulation을 한 후, 조건을 변화시켜 가면서 Chip 내부 온도가 어떻게 변화하는지 알아보았다. Chip에 1.8 hour 동안 4W의 열원을 주고, 주위는 2
$0^{\circ}C$ 자연대류로 놓고 Transient Thermal Simulation한 결과는 약 99$^{\circ}C$ 로, 허용 가능한 온도인 11$0^{\circ}C$ 보다 약 11$^{\circ}C$ 낮음을 알 수 있었다. 또한 이는 실험값인 약 95$^{\circ}C$ 와 유사한 값을 나타내었다. -
When a thermoset conductive adhesive joints are subjected to the thermal cycles, the thermal stresses are developed around the joints. Most of in-plane, hi-axial components of these residual stresses induces large tensile peel stresses and weakens adhesive joints. Also these stresses vary with thermal cycles, and result in thermal fatigue loading and debonding propagation. In this study, the thermal ratchetting effect in conductive adhesive joints are evaluated by the finite element analysis with the viscoelastic material model. In order to Investigate the relationship between thermal ratchetting and glass transition temperature, the mathematical material model has been developed experimentally by dynamic mechanical analysis. These material models are implemented to the finite element analysis with thermal loading cycles. And the stress profiles around the conductive adhesive joints are calculated. It has been observed that the thermal ratchetting occurs when the maximum temperature of thermal cycles is above the glass transition temperature. The peel and shear stress components increase as the thermal loading time increases. This will contributes to thermal fatigue fracture of the joints.
-
So far, many kinds of researches on the ceramic chip components and MCM-C RF module especially on the 3-dimensional ceramic module using embedded passives have been performed. LTCC system has many kinds of advantages, like low lass, low cost of process, stability of process etc.. But it's so hard to adjust the characteristics of passives in ceramic module after fabrication. So the exact prediction of behavior of components in high frequency region upper than 2 GHz must be made. In this procedure, the exact measurement is need. In this study, many kinds of measurement Jigs are compared and optimized, and measurement methods of each parameter are designed.
-
전자부품의 고성능화 고집적화를 위한 표면실장기술의 발전과 환경과 건강에 대한 관심의 증가로 땜납 중의 납의 독성과 그에 따른 납 사용 규제 움직임과 선진국의 법규제에 대응 하여 무연 땜납이 개발되고 있다. 본 연구는 이러한 배경에서 무연 땜납용 볼에 관한 기술정보의 유용성의 제고와 객관적인 비교평가를 위한 표준을 제시하는데 그 목적이 있다. 본 연구에서는 납점용 볼의 표준화 현황을 조사하고, 기업을 대상으로 설문조사를 실시하여 납땜용 볼에 대한 인식과 표준화 현황을 조사하였다. 또, 기존에 납땜용 볼에 관하여 발표되었던 자료들을 조사하여, 유연.무연 납땜용 볼의 품질특성과 그 평가방법을 비교하여 연구하였다. 무연 납땜용 볼은 외관이 거칠고, 융점과 표면장력의 차이로 인하여 젖음성이 떨어지며, 리플로우 조건에 따라 접합부의 높이에 변화가 있으며, 접합강도는 높아지는 특성을 보였으며 접합부의 신뢰성에서도 유연 납땜용 볼과는 많은 차이를 보였다. 이런 무연 땜납의 특성을 감안하여, 몇 가지 품질특성별 평가방법 및 기준을 제시하였다.
-
A common YBCO powder has been made from a mixture of Y123 and Y211 that heated at different temperatures, respectively. The synthesis temperature of Y211 is lower than Y123. If Y211 has been heated as a synthesis temperature of Y123, a particle size of it may be very coarse. It exist as one of main defects for superconductor. But We simultaneously synthesize a YBCO(its composition is (Y123+0.4Y211)+
$lwt%CeO_2$ ) using polymeric complex method. In the YBCO, the Y123 is synthesized lower temperature than other methodes, and its crystal structure is orthorombic. For measurement of these superconducting properties, we fabricated a YBCO single crystal. The manufactured YBCO single crystal is measured a magnetic distribution device using 0.5Tesla magnet and trapped magnet fields in it are 0.2Tesla. -
The cobalt silicide was formed OH POly-Si/SiO
$_2$ /Si Substrates by the E-beam evaporation of Co metal and rapid thermal annealing method for the application of heating actuators. The most stable CoSi$_2$ crystal was obtained at temperature of above$700^{\circ}C$ for 20 sec in$N_2$ ambient. From the SEM observation, the thickness and diameter of the heating elements were about$1{\mu}{\textrm}{m}$ and$50{\mu}{\textrm}{m}$ , respectively. Temperature resistance coefficient of heating elements was found to be about 0.0014($1/^{\circ}C$ ) with$30~35\Omega$ of resistance. -
스크린 인쇄법으로 전계 발광 소자를 제작하였으며, 고온 다습의 THB 시험을 통해 신뢰성을 평가하였으며, 고전계인가시 소자 표면에 발생된 흑점을 SEM, EDX를 통해 분석하였다. 배면 보호층의 종류와 도포 방법과 도포 횟수에 따른 정전용량, 유전손실, 휘도의 특성을 조사하였다. 이방성 접착제를 사용하여 단자의 종류에 따른 특성을 평가하였고, 단자 접착력에 따른 전기적인 특성을 조사하였다.
-
극자외선 노광공정(EUVL: Extreme Ultraviolet Lithography)은 반도체 공정에서 0.1
$\mu\textrm{m}$ 이하의 해상도를 실현하기 위해 연구되고 있는 유력한 차세대 노장공정(NGL: Next Generation Lithography)이다. [1] 본 연구에서는 극자외선 노광공정에서 사용되는 반사형 다층박막 미러를 제조하기 위해서 직접 제작한 전산모사 도구를 이용하여 130~135$\AA$ 의 파장 영역에서 고반사도를 가지는 효율적인 다층박막의 구조인자를 예측하였으며, 그러한 구조인자를 실현하기 위해서 상온(~300K)에서 마그네트론 스퍼터링을 이용하여 다층박막을 증착하였다. 증착조건 중에서, 공정압력에 따른 다층박막 계면 성장의 질적 의존성이 나타났으며, 결과적으로는 낮은 공정압력에서 더좋은 계면특성을 가지는 다층박막이 형성되었다. 다층박막의 구성물질로 Ru, Mo, Si을 사용하였으며, 다층박막의 구조분석은 high/low angle XRD, 단면 TEM images 등을 이용하여 분석되었다. -
In this paper the maximum current carrying capability of ACAs flip chip joint is investigated based on two failure mechanisms: (1) degradation of the interface between gold stud bumps and aluminum pads; and (2) ACA swelling between chips and substrates under high current stress. For the determination of the maximum allowable current, bias stressing was applied to ACAs flip chip joint. The current level at which current carrying capability is saturated is defined as the maximum allowable current. The degradation mechanism under high current stress was studied by in-situ monitoring of gold stud bump-aluminum pad ACA contact resistance and also ACA junction temperature at various current level. The cumulative failure distributions were used to predict the lifetime of ACAs flip chip joint under high current stressing. These experimental results can be used to better understand and to improve the current carrying capability of ACA flip chip joint.
-
Metal oxides with high dielectric constants have the potential to expend scaling of transistor gate capacitance beyond that of ultrathin silicon dioxide. However, during deposition of most metal oxides on silicon, an interfacial region of SiOx is formed and limits the specific capacitance of the gate structure. We deposisted aluminum oxide and examined the composition of the interfacial layer by employing high-resolution X-ray photoelectron spectroscopy and X-ray reflectivity. We find that the interfacial region is not pure SiO
$_2$ , but is composed of a complex depth-dependent ternary oxide of$AlSi_xO_y$ and the pure SiO$_2$ . -
In this study,
$CeO_2$ thin films were etched with an addition of$Cl_2$ gas to$Ar/CF_4$ gas mixing in an inductively coupled plasma(ICP) etcher. The surface reactions of the etched$_CeO2$ thin films were investigated by X-ray photoelectron spectroscopy(XPS). It was analyzed that Ce peaks were mainly observed in Ce-O bonds formed$CeO_2$ or$CeO_3$ compounds. Cl peaks were detected by the peaks of Cl$2p_{3/2}$ and Cl$2p_{1/2}$ . Almost all of Cl atoms were combined with Ce atoms like$CeCl_{x}$ compounds. -
We design and characterize a millimeter-wave ceramic package in a frequency range from DC to 300Hz using the FEM(Finite Element Method) calculation. From these calculation results, the designed feed-through structure achieved 0.32 dB, 16.8 dB of the insertion loss and the return loss at 30 GHz respectively. This ceramic package will be useful for MMIC(Monolithic Microwave Integrated Circuit) modules.
-
Kang, Young-Jae;Eom, Dae-Hong;Park, Jum-Yong;Park, Jin-Gu;Ko, Soong;Myung, Beom-Young;Lee, Sang-Ik;Kwon, Pan-Gi 270
Conditioning은 CMP(Chemical Mechanical Planarization)에 필수적인 공정중의 하나이다. Conditioning의 목적은 removal rate와 uniformity를 CMP 공정 중에서 일정하게 유지시키는데 목적이 있다. 예전의 conditioning disks는 stainless steel substrate 위에 diamond 입자를 올리고 Ni전기도금을 결합시켜서 사용하였다. 그러나, CMP 공정 중에 Ni의분해로 인한 금속의 오염과 diamond abrasive의 분리로 인하여 scratch 문제가 발생하였다. 이 문제를 해결하기 위해서 ceramic substrate와 그것을 정밀 가공하는 기술을 응용함으로써 본래의 conditioning disks가 가지고 있는 diamond 입자의 분리와 metals 분해의 문제를 해결할 수 있게 되었다. -
The purpose of this study was to characterize the reaction of Cu surface with Cu slurry and CMP performance as a function of additives in CMP slurry. The polish rate of Cu was dependent on the kind of organic acids added in slurry. It was considered that polish rate of Cu was dependent on the concentration of carboxylates and mean particle size. When the etchant and oxidant were added in slurry, the highest removal rate and lower etch rate were measured at neutral pH. The addition of etchant, oxidant and pH adjustor played key roles of CMP ability in slurry. As the pH increased, polish rate of Cu was increased by the enhanced the mechanical effects due to effective dispersion of slurry particles. Alumina abrasives was more desirable for 1st step slurry because of high removal rate of Cu and high selectivity ratio among TaN and Cu.