This paper presents product level considerations for multichip packaging as a cost effective alternative to single chip packaging in the design and manufacture of mobile telephony products. Important aspects include component functionality and complexity, acquisition and logistics costs, product modularity and integration. Multichip packaging offers unique solutions and significant system level cost savings in many applications including RF modules, digital matrix functions and product options such as security, data storage, voice recognition, etc.

Fairchild has been developing a new class IPM called SPM consisting of dramatic Packaging technology to achieve the lowest cost rind better performance for low power home appliances and industrial AC drive applications. The first Fairchild SPM development with IGBT 600V/15A for washing machine application started in 1999 and was completed successfully. Fairchild SPMs are going to be the best solution for low power inverter-driven AC drive system after 2001. The new SPM Packages like SPM ∥ and SPIM for the next generation IPM with the highest competitiveness (cost & performance) shall be continuouslly developed.

The BGA Package has been the area array package of choice for several rears. Recently, the transition has been to finer pitch configuration called Chip Scale Packages (CSP). Several of these package types are available at 0.5 mm pitch, requiring surface mount assemblers to evaluate and optimize various elements of the assembly process. This presentation describes the issues associated with making the transition from BGA to CSP assembly. Areas addressed will include the accuracy of pick and piece equipment, printed wiring board lines and spaces, PWB vias, in-circuit test issues, solder paste printing, moisture related factors, rework and reliability. The transition to 0.5 mm pitch requires careful evaluation of the board design, solder paste selection, stencil design and component placement accuracy. At this pitch, ball and board pad diameters can be as small as 0.25 mm and 0.20 mm respectively. Drilled interstitial vias are no longer possible and higher ball count packages require micro-via board technology. The transition to CSP requires careful evaluation of these issues. Normal paste registration and BGA component tolerances can no longer achieve the required process levels and higher accuracy pick and place machines need to be implemented. This presentation will examine the optimization of these critical assembly operations, contrast the challenges at 0.5 mm and also look at the continuation of the process to incorporate smaller pitch flip chip devices.

Flip chip assembly on organic substrates using ACAs have received much attentions due to many advantages such as easier processing, good electrical performance, lower cost, and low temperature processing compatible with organic substrates. ACAs are generally composed of epoxy polymer resin and small amount of conductive fillers (less than 10 wt.%). As a result, ACAs have almost the same CTE values as an epoxy material itself which are higher than conventional underfill materials which contains lots of fillers. Therefore, it is necessary to lower the CTE value of ACAs to obtain more reliable flip chip assembly on organic substrates using ACAs. To modify the ACA composite materials with some amount of conductive fillers, non-conductive fillers were incorporated into ACAs. In this paper, we investigated the effect of fillers on the thermo-mechanical properties of modified ACA composite materials and the reliability of flip chip assembly on organic substrates using modified ACA composite materials. Contact resistance changes were measured during reliability tests such as thermal cycling, high humidity and temperature, and high temperature at dry condition. It was observed that reliability results were significantly affected by CTEs of ACA materials especially at the thermal cycling test. Results showed that flip chip assembly using modified ACA composites with lower CTEs and higher modulus by loading non-conducting fillers exhibited better contact resistance behavior than conventional ACAs without non-conducting fillers. Microwave model and high-frequency measurement of the ACF flip-chip interconnection was investigated using a microwave network analysis. ACF flip chip interconnection has only below 0.1nH, and very stable up to 13 GHz. Over the 13 GHz, there was significant loss because of epoxy capacitance of ACF. However, the addition of $SiO_2filler$ to the ACF lowered the dielectric constant of the ACF materials resulting in an increase of resonance frequency up to 15 GHz. Our results indicate that the electrical performance of ACF combined with electroless Wi/Au bump interconnection is comparable to that of solder joint.

Due to pressure from threatened legislation in Europe, consumer and governmental pressure in Japan, and glob머 market considerations in the US, there is a rapidly growing interest in lead-free solderinger, Although the move to lead free soldering seems inevitable, many problems will arise in production assembly. It is generally acknowledged that the lead-free solders available offer a much s smaller process window than lead/tin, related mainly to the higher soldering temperatures which naturally result from increases of liquidus temperatures of at least 300 C. However, raising reflow temperatures from the current 220-2300 C to 250 2600 C will lead to problems with the boards and components as well as i increasing oxidation effects. There is a need to keep reflow temperatures low without reducing solderablity. Some results on benefits of inert atmospheres are discussed in this paper. For example, testing in a nitrogen atmosphere, with 300 ppm oxygen, by the N National Physical Laboratory (NPU has revealed clear benefits for ine$\pi$mg lead-free alloys, by restoring the solderability to lead/tin levels, by enabling lower soldering temperatures. However, there has been little testing over a range of oxygen levels in nitrogen and this is an important issue in determining n nitrogen supply and oven costs. Some results are reported here from work by NPL conducted for BOC in w which solderability was evaluated for tin기ead and tin/silver/copper eutectic a alloys in a wetting balance over a range of oxygen levels form 10 ppm to 21% ( (air). The studies confirm that acceptable wetting times occur in inert atmospheres a at soldering temperatures 20 to 300 C lower than are possible in air.

Economical consumption of energy, longer life of lamps, higher lighting comfort and new aesthetic of illumination is subject of numerous research and development works. The halogen lamps are an example of positive solution some of above mentioned problems. The electronic transformers are more frequent used for their supply. In comparison with conventional transformers they have less weight, less volume and 60% less power tosses. Their advantages are particular visible, when the hybrid technique is applied. The paper presents the results of engineering research and development works carried out ill Private Institute of Electronic Engineering, in R. & D. Center for Hybrid Microelectronics and Resistors and in Technical School of Communications in Krakow, in the field of the design and exploitation tests of hybrid converters 220V AC /12V DC (electronic transformers) and electronic ballasts destined for the supply of halogen lamps 20W to 150W and fluorescent lamps respectively. To perform the converters, thick film technology and surface mount technology were used. For the protection of converter electronic circuit the thick film temperature sensor and transistors were applied. Moreover the paper presents the base application circuits of elaborated converters, their technical parameters and exploitation results. The development perspectives of hybrid domain of hybrid circuits are also discussed.