• 제목/요약/키워드: via holes

검색결과 139건 처리시간 0.041초

인쇄회로기판의 미세 신호 연결 홀 형성을 위한 레이저 드릴링 시스템 (Laser Drilling System for Fabrication of Micro via Hole of PCB)

  • 조광우;박홍진
    • 한국정밀공학회지
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    • 제27권10호
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    • pp.14-22
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    • 2010
  • The most costly and time-consuming process in the fabrication of today's multi-layer circuit board is drilling interconnection holes between adjacent layers and via holes within a layer. Decreasing size of via holes being demanded and growing number of via holes per panel increase drilling costs. Component density and electronic functionality of today's multi-layer circuit boards can be improved with the introduction of cost-effective, variable depth laser drilled blind micro via holes, and interconnection holes. Laser technology is being quickly adopted into the circuit board industry but can be accelerated with the introduction of a true production laser drilling system. In order to get optimized condition for drilling to FPCB (Flexible Printed Circuit Board), we use various drill pattern as drill step. For productivity, we investigate drill path optimization method. And for the precise drilling the thermal drift of scanner and temperature change of scan system are tested.

FR4 PCB의 Via-hole이 LED 패키지에 미치는 열적 특성 분석 (Analysis of Thermal Properties in LED Package by Via hole of FR4 PCB)

  • 이세일;이승민;박대희
    • 조명전기설비학회논문지
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    • 제24권12호
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    • pp.57-63
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    • 2010
  • The efficiency of LED package is increasing by applying the high power, and a existing lighting is changing as the LED lighting. However, many problems have appeared by heat. Therefore, in order to solve thermal problems, LED lighting is designing in several ways, but the advantages of LED lighting is fading due to increase the prices and volumes. In this study, we try to improve the thermal performance by formation of via holes. The junction temperature and thermal resistance in the FR4-PCB with via-holes of 0.6[mm] was excellent in experiment and FR4-PCB with Via-holes of 0.6[mm] was excellent in simulation without solder. Further, the thermal resistance and the optical properties can be improved through a formation of via-holes.

전류인가 방법이 3D-SiP용 Through Via Hole의 Filling에 미치는 영향 (The Effects of Current Types on Through Via Hole Filling for 3D-SiP Application)

  • 장근호;이재호
    • 마이크로전자및패키징학회지
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    • 제13권4호
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    • pp.45-50
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    • 2006
  • 3D package의 SiP에서 구리의 via filling은 매우 중요한 사항으로 package밀도가 높아짐에 따라 via의 크기가 줄어들며 전기도금법을 이용한 via filling이 연구되어왔다. Via filling시 via 내부에 결함이 발생하기 쉬운데 전해액 내에 억제제, 가속제등 첨가제를 첨가하고 펄스-역펄스(PRC)의 전류파형을 인가하여 결함이 없는 via의 filling이 가능하다. 본 연구에서는 건식 식각 방법 중 하나인 DRIE법을 이용하여 깊이 $100{\sim}190\;{\mu}m$, 직경이 각각 $50{\mu}m,\;20{\mu}m$인 2가지 형태의 via을 형성하였다. DRIE로 via가 형성된 Si wafer위에 IMP System으로 Cu의 Si으로 확산을 막기 위한 Ta층과 전해도금의 씨앗층인 Cu층을 형성하였다. Via시편은 직류, 펄스-역펄스의 전류 파형과 억제제, 가속제, 억제제의 첨가제를 모두 사용하여 filling을 시도하였고, 공정 후 via의 단면을 경면 가공하여 SEM으로 관찰하였다.

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2단계 건식식각에 의한 GaAs Via-Hole 형성 공정 (A Via-Hole Process for GaAs MMIC's using Two-Step Dry Etching)

  • 정문식;김흥락;이지은;김범만;강봉구
    • 전자공학회논문지A
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    • 제30A권1호
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    • pp.16-22
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    • 1993
  • A via-hole process for reproducible and reliable GaAs MMIC fabrication is described. The via-hole etching process consists of two step dry etching. During the first etching step a BC $I_{3}$/C $I_{2}$/Ar gas mixure is used to achieve high etch rate and small lateral etching. In the second etching step. CC $L_{2}$ $F_{2}$ gas is used to achieve selective etching of the GaAs substrate with respect to the front side metal layer. Via holes are formed from the backside of a 100$\mu$m thick GaAs substrate that has been evaporated initially with 500.angs. thick chromium and subsequently a 2000.angs. thick gold layer. The fabricated via holes are electroplated with gold (~20$\mu$m thick) to form via connections. The results show that established via-hole process is satisfactory for GaAs MMIC fabrication.

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Design for a Dual-Frequency Antenna-in-Package

  • Li, Li;Han, Liping;Han, Guorui;Chen, Xinwei;Geng, Yanfeng;Zhang, Wenmei
    • ETRI Journal
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    • 제32권4호
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    • pp.614-617
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    • 2010
  • For an antenna-in-package (AiP), via holes are used to connect the antenna ground and system ground. In this letter, a dual-frequency AiP with a U-slot embedded in the patch is proposed. By properly arranging three via holes under the non-radiating edge, an AiP with two resonant frequencies is realized. Then a U-slot is embedded in the patch to further improve the bandwidth of the AiP. To validate the proposed design, an AiP with the bandwidth of 4.49% at 2.45 GHz and 6.02% at 5.32 GHz is achieved and fabricated. The measured results agree with the simulated results.

High -Rate Laser Ablation For Through-Wafer Via Holes in SiC Substrates and GaN/AlN/SiC Templates

  • Kim, S.;Bang, B.S.;Ren, F.;d'Entremont, J.;Blumenfeld, W.;Cordock, T.;Pearton, S.J.
    • JSTS:Journal of Semiconductor Technology and Science
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    • 제4권3호
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    • pp.217-221
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    • 2004
  • [ $CO_2$ ]laser ablation rates for bulk 4H-SiC substrates and GaN/AIN/SiC templates in the range 229-870 ${\mu}m.min^{-1}$ were obtained for pulse energies of 7.5-30 mJ over diameters of 50·500 ${\mu}m$ with a Q-switched pulse width of ${\sim}30$ nsec and a pulse frequency of 8 Hz. The laser drilling produces much higher etch rates than conventional dry plasma etching (0.2 - 1.3 ${\mu}m/min$) making this an attractive maskless option for creating through-wafer via holes in SiC or GaN/AlN/SiC templates for power metal-semiconductor field effect transistor applications. The via entry can be tapered to facilitate subsequent metallization by control of the laser power and the total residual surface contamination can be minimized in a similar fashion and with a high gas throughput to avoid redeposition. The sidewall roughness is also comparable or better than conventional via holes created by plasma etching.

Via-Hole 접지를 고려한 K-대역 인터디지트 대역통과 필터분석 (The Analysis of Interdigital Bandpass Filter or K-band)

  • 심재우;이영철;김영진
    • 한국정보통신학회논문지
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    • 제4권4호
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    • pp.825-834
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    • 2000
  • 본 논문에서는 비아-홀 접지를 고려한 K-대역 인터디지트 대역통과필터를 설계하였다. 중심 주파수가 19.6GHz에서 25~30%대역만을 통과시키기 위해 6차 인터디지트 대역통과 필터를 마이크로 스트립라인으로 구성하였으며 비아-흘의 수에 따른 필터의 특성을 분석하였다. 비아-흘 접지와 인터디지트 대역통과필터는 설계 최적화 과정을 통하여 통과대역에서 중심주파수와 대역폭관계를 만족시킬 수 있었으며 실제 제작후 측정결과 중심주파수는 19.150Hz 삽입손실은 -4.IdB, 반사계수는 -16.7dB로 비아-홀 접지의 영향을 고려한 설계가 이루어짐을 증명하였다.

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산업용 안전모 정부 근처 통기구멍에 관한 연구 (A Study on Ventilation Holes Near the Crown of Industrial Safety Helmets)

  • 김진현;최혁중
    • 한국안전학회지
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    • 제27권5호
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    • pp.196-202
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    • 2012
  • An industrial safety helmet primarily intended to protect the wearer's head. It is to prevent or reduce the danger due to flying or dropping objects, falling and prevent the danger due to an electric shock given to the head. However, thermal discomfort of the head is one of the main complaints in the case of wearing safety helmet. Ventilation holes are not allowed in safety helmets on domestic regulations except for industrial safety helmets which are to protect wearer's head against flying or dropping objects. This paper is to produce the need for enlargement of allowing on ventilation holes' regulation to class B. This study reviewed foreign standards' regulations on ventilation holes of safety helmets. Some standards recommend that ventilation may be improved when fresh air is able to enter the helmet around its lower edge and to exit via holes in the helmet located in the upper one third of the helmet. And in the experiments, relationships of ventilation holes and the temperature over the head are analyzed. The experimental results show that the cooling effect of ventilation holes in the upper one third of the helmet is meaningful.

MEMS 소자의 비아 홀에 대한 레이저 공정변수의 최적화 (Optimization of Laser Process Parameters for Realizing Optimal Via Holes for MEMS Devices)

  • 박시범;이철재;권희준;전찬봉;강정호
    • 대한기계학회논문집A
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    • 제34권11호
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    • pp.1765-1771
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    • 2010
  • MEMS 소자의 공정에서 가공된 비아 홀 품질은 소자의 성능에 가장 중요한 요소의 하나이다. Nd:$YVO_4$ 레이저로 가공한 비아 홀에 대한 레이저 미세가공의 일반적인 특징을 설명하고 그것의 측정에 대한 효율적인 최적화 방법을 소개한다. 본 논문의 최적화 방법은 직교다항식, 분산분석과 반응표면최적화는 최적 레이저 공정변수를 결정하고 주요 영향을 이해하는데 사용된다. 유의한 레이저 공정변수를 확인하고 이의 비아 홀 품질에 관한 영향을 고찰하였다. 레이저 공정변수의 최적 수준을 가지는 확인 실험은 최적화 방법의 유효성을 설명하기 위해 수행하였다.