• Journal of the Korean Society for Precision Engineering
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• 제27권10호
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• pp.14-22
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• 2010

The most costly and time-consuming process in the fabrication of today's multi-layer circuit board is drilling interconnection holes between adjacent layers and via holes within a layer. Decreasing size of via holes being demanded and growing number of via holes per panel increase drilling costs. Component density and electronic functionality of today's multi-layer circuit boards can be improved with the introduction of cost-effective, variable depth laser drilled blind micro via holes, and interconnection holes. Laser technology is being quickly adopted into the circuit board industry but can be accelerated with the introduction of a true production laser drilling system. In order to get optimized condition for drilling to FPCB (Flexible Printed Circuit Board), we use various drill pattern as drill step. For productivity, we investigate drill path optimization method. And for the precise drilling the thermal drift of scanner and temperature change of scan system are tested.

• Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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• 제24권12호
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• pp.57-63
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• 2010

The efficiency of LED package is increasing by applying the high power, and a existing lighting is changing as the LED lighting. However, many problems have appeared by heat. Therefore, in order to solve thermal problems, LED lighting is designing in several ways, but the advantages of LED lighting is fading due to increase the prices and volumes. In this study, we try to improve the thermal performance by formation of via holes. The junction temperature and thermal resistance in the FR4-PCB with via-holes of 0.6[mm] was excellent in experiment and FR4-PCB with Via-holes of 0.6[mm] was excellent in simulation without solder. Further, the thermal resistance and the optical properties can be improved through a formation of via-holes.

• Journal of the Microelectronics and Packaging Society
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• 제13권4호
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• pp.45-50
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• 2006

Copper via filling is the important factor in 3-D stacking interconnection of SiP (system in package). As the packaging density is getting higher, the size of via is getting smaller. When DC electroplating is applied, a defect-free hole cannot be obtained in a small size via hole. To prevent the defects in holes, pulse and pulse reverse current was applied in copper via filling. The holes, $20\and\;50{\mu}m$ in diameter and $100{\sim}190\;{\mu}m$ in height. The holes were prepared by DRIE method. Ta was sputtered for copper diffusion barrier followed by copper seed layer IMP sputtering. Via specimen were filled by DC, pulse and pulse-reverse current electroplating methods. The effects of additives and current types on copper deposits were investigated. Vertical and horizontal cross section of via were observed by SEM to find the defects in via. When pulse-reverse electroplating method was used, defect free via were successfully obtained.

• Journal of the Korean Institute of Telematics and Electronics A
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• 제30A권1호
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• pp.16-22
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• 1993

A via-hole process for reproducible and reliable GaAs MMIC fabrication is described. The via-hole etching process consists of two step dry etching. During the first etching step a BC $I_{3}$/C $I_{2}$/Ar gas mixure is used to achieve high etch rate and small lateral etching. In the second etching step. CC $L_{2}$ $F_{2}$ gas is used to achieve selective etching of the GaAs substrate with respect to the front side metal layer. Via holes are formed from the backside of a 100$\mu$m thick GaAs substrate that has been evaporated initially with 500.angs. thick chromium and subsequently a 2000.angs. thick gold layer. The fabricated via holes are electroplated with gold (~20$\mu$m thick) to form via connections. The results show that established via-hole process is satisfactory for GaAs MMIC fabrication.

• ETRI Journal
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• 제32권4호
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• pp.614-617
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• 2010

For an antenna-in-package (AiP), via holes are used to connect the antenna ground and system ground. In this letter, a dual-frequency AiP with a U-slot embedded in the patch is proposed. By properly arranging three via holes under the non-radiating edge, an AiP with two resonant frequencies is realized. Then a U-slot is embedded in the patch to further improve the bandwidth of the AiP. To validate the proposed design, an AiP with the bandwidth of 4.49% at 2.45 GHz and 6.02% at 5.32 GHz is achieved and fabricated. The measured results agree with the simulated results.

• JSTS:Journal of Semiconductor Technology and Science
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• 제4권3호
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• pp.217-221
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• 2004

[ $CO_2$ ]laser ablation rates for bulk 4H-SiC substrates and GaN/AIN/SiC templates in the range 229-870 ${\mu}m.min^{-1}$ were obtained for pulse energies of 7.5-30 mJ over diameters of 50·500 ${\mu}m$ with a Q-switched pulse width of ${\sim}30$ nsec and a pulse frequency of 8 Hz. The laser drilling produces much higher etch rates than conventional dry plasma etching (0.2 - 1.3 ${\mu}m/min$) making this an attractive maskless option for creating through-wafer via holes in SiC or GaN/AlN/SiC templates for power metal-semiconductor field effect transistor applications. The via entry can be tapered to facilitate subsequent metallization by control of the laser power and the total residual surface contamination can be minimized in a similar fashion and with a high gas throughput to avoid redeposition. The sidewall roughness is also comparable or better than conventional via holes created by plasma etching.

• Journal of the Korea Institute of Information and Communication Engineering
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• 제4권4호
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• pp.825-834
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• 2000

In this paper, we have designed a bandpass filter with via-holes ground on K-band To pass only the 25 ~30% of the bandwidth at the center frequency of 19.6GHz, we have designed a six-order interdigital bandpass filter using microstrip lines. Simulation results of optimization according to via-holes size and numbers of interdigit bandpass filter shows a excellent agreement with theoretical values on passband frequency. Experimental results of BP filters show that mesaured center frequency is 19.150Hz, insertion loss, -4.1dB, reflection coefficient, -16.7dB. It proved that the vis-holes ground size and numbers must be considered to design the bandpass filter.

• Journal of the Korean Society of Safety
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• 제27권5호
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• pp.196-202
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• 2012

An industrial safety helmet primarily intended to protect the wearer's head. It is to prevent or reduce the danger due to flying or dropping objects, falling and prevent the danger due to an electric shock given to the head. However, thermal discomfort of the head is one of the main complaints in the case of wearing safety helmet. Ventilation holes are not allowed in safety helmets on domestic regulations except for industrial safety helmets which are to protect wearer's head against flying or dropping objects. This paper is to produce the need for enlargement of allowing on ventilation holes' regulation to class B. This study reviewed foreign standards' regulations on ventilation holes of safety helmets. Some standards recommend that ventilation may be improved when fresh air is able to enter the helmet around its lower edge and to exit via holes in the helmet located in the upper one third of the helmet. And in the experiments, relationships of ventilation holes and the temperature over the head are analyzed. The experimental results show that the cooling effect of ventilation holes in the upper one third of the helmet is meaningful.

• Transactions of the Korean Society of Mechanical Engineers A
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• 제34권11호
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• pp.1765-1771
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• 2010

In the case of micro.electro-mechanical system (MEMS) devices, the quality of punched via hole is one of the most important factors governing the performance of the device. The common features that affect the laser micromachining of via holes drilled by using Nd:$YVO_4$ laser are described, and efficient optimization methods to measure them are presented. The analysis methods involving an orthogonal array, analysis of variance (ANOVA), and response surface optimization are employed to determine the main effects and to determine the optimal laser process parameters. The significant laser process parameters were identified and their effects on the quality of via holes were studied. Finally, an experiment in which the optimal levels of the laser process parameters were used was carried out to demonstrate the effectiveness of the optimization method.

• Proceedings of the Korean Society of Precision Engineering Conference
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• 한국정밀공학회 2012년도 춘계학술대회 논문집
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• pp.673-674
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• 2012