• Journal of Bio-Environment Control
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• v.29 no.4
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• pp.320-325
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• 2020

This study aimed to analyze thermo-keeping and economic feasibility by utilizing silica aerogel, which has been attracting attention as a new material, complementing the disadvantages of the conventional multi-layered thermal screen, and producing and installing multi-layered thermal screen. The multi-layered thermal screen used in the experiment was produced in two combinations using a non-woven fabric containing silica aerogel and measured and compared the temperature and fuel consumption changes due to differences in practice with the multi-layered thermal screen being sold and used on the market. Experimental results show that the temperature and relative humidity changes due to the differences of the multi-layered thermal screens in the single-span greenhouse and the multi-span greenhouse were small but remained almost the same temperature and relative humidity. It is judged that this shows that the multi-layered thermal screen using silica aerogel is not inferior to the conventional multi-layered thermal screen. As a result of a comparative analysis of heating energy, the aerogel-based multi-layered thermal screen reduced fuel consumption by about 15% in the single-span greenhouse and about 20% in the multi-span greenhouse compared to the conventional multi-layered thermal screen. It is clear that heating energy is saved as a greenhouse size and duration increase. It was found that the silica aerogel-based multi-layered screen was more breathable and warmer than the conventional multi-layered thermal screen, but It was found that the multi-layered screen used in the multi-span greenhouse was heavier and stiff compared with the conventional multi-layered thermal screen, indicating less workability and operability. Therefore, improvements were applied to the multi-layered screens used in the single-span greenhouses. It was confirmed that the replacement of internal insulation materials reduced thickness and improved stiffness so that there could be sufficient possibility for farmers to use.

• JSTS:Journal of Semiconductor Technology and Science
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• v.14 no.5
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• pp.601-608
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• 2014

In this paper, we have characterized the electrical properties related to gate leakage current in AlGaN/GaN MISHFETs with varying the thickness (0 to 10 nm) of $Al_2O_3$ gate insulator which also serves as a surface protection layer during high-temperature RTP. The sheet resistance of the unprotected TLM pattern after RTP was rapidly increased to $1323{\Omega}/{\square}$ from the value of $400{\Omega}/{\square}$ of the as-grown sample due to thermal damage during high temperature RTP. On the other hand, the sheet resistances of the TLM pattern protected with thin $Al_2O_3$ layer (when its thickness is larger than 5 nm) were slightly decreased after high-temperature RTP since the deposited $Al_2O_3$ layer effectively neutralizes the acceptor-like states on the surface of AlGaN layer which in turn increases the 2DEG density. AlGaN/GaN MISHFET with 8 nm-thick $Al_2O_3$ gate insulator exhibited extremely low gate leakage current of $10^{-9}A/mm$, which led to superior device performances such as a very low subthreshold swing (SS) of 80 mV/dec and high $I_{on}/I_{off}$ ratio of ${\sim}10^{10}$. The PF emission and FN tunneling models were used to characterize the gate leakage currents of the devices. The device with 5 nm-thick $Al_2O_3$ layer exhibited both PF emission and FN tunneling at relatively lower gate voltages compared to that with 8 nm-thick $Al_2O_3$ layer due to thinner $Al_2O_3$ layer, as expected. The device with 10 nm-thick $Al_2O_3$ layer, however, showed very high gate leakage current of $5.5{\times}10^{-4}A/mm$ due to poly-crystallization of the $Al_2O_3$ layer during the high-temperature RTP, which led to very poor performances.

• Journal of the Microelectronics and Packaging Society
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• v.12 no.3 s.36
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• pp.187-196
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• 2005

MEMS devices such as a vibratory gyroscope often suffer from a lower yield rate due to fabrication errors and the external stress. In the decoupled vibratory gyroscope, the main factor that determines the yield rate is the frequency difference between the sensing and driving modes. The gyroscope, fabricated with SOI (Silicon-On-Insulator) wafer and packaged using the anodic bonding, has a large wafer bowing caused by thermal expansion mismatch as well as non-uniform surfaces of the structures caused by the notching effect. These effects result in large distribution in the frequency difference, and thereby a lower yield rate. To improve the yield rate we propose a packaged SiOG (Silicon On Glass) technology. It uses a silicon wafer and two glass wafers to minimize the wafer bowing and a metallic membrane to avoid the notching. In the packaged SiOG gyroscope, the notching effect is eliminated and the warpage of the wafer is greatly reduced. Consequently the frequency difference is more uniformly distributed and its variation is greatly improved. Therefore we can achieve a more robust vibratory MEMS gyroscope with a higher yield rate.

• Proceedings of the IEEK Conference
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• 2005.11a
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• pp.619-622
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• 2005

본 논문에서는 서로 다른 Si 두께 ($T_{Si}$ = 27, 50 nm) 를 갖는 SOI (Silicon On Insulator) 기판 위에 다양한 두께의 Ni/Co를 순차적으로 증착한 후 Bulk-Si과의 비교를 통해 Silicide의 형성 특성에 대하여 분석하였다. 우선 급속 열처리 (RTP, Rapid Thermal Processing) 를 통하여 Silicide를 형성한 후 측정결과 Si두께에 따라 Silicide의 특성이 달라짐을 확인하였다. 두꺼운 두께의 Si-film을 갖는 SOI 기판을 사용한 경우 증착된 금속의 두께에 따라 Bulk-Si와 비슷한 면저항 특성을 보였으나, 얇은 두께의 Si-film을 갖는 SOI기판을 사용한 경우에는 제한된 Si의 공급으로 인한 Silicide의 비저항 증가로 인하여 증착된 금속의 두께에 따라 면저항이 감소하다가 다시 증가하는 'V' 자형 곡선을 나타내었다.

• Korean Journal of Materials Research
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• v.21 no.2
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• pp.115-119
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• 2011

Si Nanowire (NW) field effect transistors (FETs) were fabricated on hard Si and flexible polyimide (PI) substrates, and their electrical characteristics were compared. Si NWs used as channels were synthesized by electroless etching method at low temperature, and these NWs were refined using a centrifugation method to get the NWs to have an optimal diameter and length for FETs. The gate insulator was poly(4-vinylphenol) (PVP), prepared using a spin-coating method on the PI substrate. Gold was used as electrodes whose gap was 8 ${\mu}m$. These gold electrodes were deposited using a thermal evaporator. Current-voltage (I-V) characteristics of the device were measured using a semiconductor analyzer, HP-4145B. The electrical properties of the device were characterized through hole mobility, $I_{on}/I_{off}$ ratio and threshold voltage. The results showed that the electrical properties of the TFTs on PVP were similar to those of TFTs on $SiO_2$. The bending durability of SiNWs TFTs on PI substrate was also studied with increasing bending times. The results showed that the electrical properties were maintained until the sample was folded about 500 times. But, after more than 1000 bending tests, drain current showed a rapid decrease due to the defects caused by the roughness of the surface of the Si NWs and mismatches of the Si NWs with electrodes.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.27 no.11
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• pp.712-717
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• 2014

Glass ceramic has a high mechanical strength and low sintering temperature. So, it can be used as a thick film substrate or a high strength insulator. A series of glass ceramic samples based on MgO-$Al_2O_3-SiO_2-ZrO_2$ (MASZ) were prepared by melting at $1,600^{\circ}C$, roll-quenching and heat treatment at various temperatures from $900^{\circ}C$ to $1,400^{\circ}C$. Dependent on the heat treatment temperature used, glass ceramics with different crystal phases were obtained. Their nucleation behavior, microstructure and mechanical properties were investigated with differential thermal analysis (DTA), X-ray diffraction (XRD), scanning electron microscopy (SEM), and Vicker's hardness testing machine. With increasing the heat treatment temperature of MASZ samples, their hardness and toughness initially increase and then reach the maximum points at $1,300^{\circ}C$, and begin to decrease at above this temperature, which is likely to be due to the softening of glass ceramics. As the content of $ZrO_2$ in MAS glass ceramics increases from 7.0 wt.% to 13 wt.%, Vicker's hardness and fracture toughness increase from $853Kg/mm^2$ to $878Kg/mm^2$ and $1.6MPa{\cdot}m^{1/2}$ to $2.4MPa{\cdot}m^{1/2}$ respectively, which seems to be related with the nucleation of elongated phases like fiber.

• Proceedings of the Korean Vacuum Society Conference
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• 2013.02a
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• pp.221-221
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• 2013

Striving to replace the well known silicon nanocrystals embedded in oxides with solution-processable charge-trapping materials has been debated because of large scale and cost effective demands. Herein, a silicon quantum dot-polystyrene nanocomposite (SiQD-PS NC) was synthesized by postfunctionalization of hydrogen-terminated silicon quantum dots (H-SiQDs) with styrene using a thermally induced surface-initiated polymerization approach. The NC contains two miscible components: PS and SiQD@PS, which respectively are polystyrene and polystyrene chains-capped SiQDs. Spin-coated films of the nanocomposite on various substrate were thermally annealed at different temperatures and subsequently used to construct metal-insulator-semiconductor (MIS) devices and thin film field effect transistors (TFTs) having a structure p-$S^{++}$/$SiO_2$/NC/pentacene/Au source-drain. C-V curves obtained from the MIS devices exhibit a well-defined counterclockwise hysteresis with negative fat band shifts, which was stable over a wide range of curing temperature ($50{\sim}250^{\circ}C$. The positive charge trapping capability of the NC originates from the spherical potential well structure of the SiQD@PS component while the strong chemical bonding between SiQDs and polystyrene chains accounts for the thermal stability of the charge trapping property. The transfer curve of the transistor was controllably shifted to the negative direction by chaining applied gate voltage. Thereby, this newly synthesized and solution processable SiQD-PS nanocomposite is applicable as charge trapping materials for TFT based memory devices.

• Journal of the Korean GEO-environmental Society
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• v.18 no.1
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• pp.5-12
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• 2017

The damage of the tunnel lining on the cold regions can be represented by cracks and leaks caused by freezing of ground water. However, domestically, the relevant construction guidelines are not provided so far. Thus, in this research, the mechanical behavior and thermal conductivity of designated tunnel area are measured using instrumentation system installed in the lining concrete inside tunnels in order to analysis their behavior with regard to temperature variations. Previous research mainly focused on the effect of temperature on the tunnel lining based on the air and initial ground temperature at urban regions. Thus, this study analyzes effects of air temperature and initial ground temperature of designated tunnel area at the cold regions. The temperature of the groundwater at the backfill of the tunnel lining are analyzed to evaluate the heating element. Numerical analyses are performed to evaluate the heating element with regard to the various initial ground temperatures.

• Journal of Information Display
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• v.12 no.4
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• pp.209-212
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• 2011

The threshold voltage shift (${\Delta}V_{th}$) under positive-voltage bias stress (PBS) of InGaZnO (IGZO) thin-film transistors (TFTs) annealed at different temperatures in air was investigated. The dramatic degradation of the electrical performance was observed at the sample that was annealed at $700^{\circ}C$. The degradation of the saturation mobility (${\mu}_{sat}$) resulted from the diffusion of indium atoms into the interface of the IGZO/gate insulator after crystallization, and the degradation of the subthreshold slope (S-factor) was due to the increase in the interfacial and bulk trap density. In spite of the degradation of the electrical performance of the sample that was annealed at $700^{\circ}C$, it showed a smaller ${\Delta}V_{th}$ under PBS conditions for $10^4$ s than the samples that were annealed at $500^{\circ}C$, which is attributed to the nanocrystal-embedded structure. The sample that was annealed at $600^{\circ}C$ showed the best performance and the smallest ${\Delta}V_{th}$ among the fabricated samples with a ${\mu}_{sat}$ of $9.38cm^2/V$ s, an S-factor of 0.46V/decade, and a ${\Delta}V_{th}$ of 0.009V, which is due to the passivation of the defects by high thermal annealing without structural change.

• Journal of Sensor Science and Technology
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• v.13 no.2
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• pp.128-132
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• 2004

Short wave infrared (SWIR) photovoltaic devices have been fabricated from metal organic vapour phase epitaxy (MOVPE) grown n- on p- HgCdTe films on GaAs substrates. The MOVPE grown films were processed into mesa type discrete devices with wet chemical etching employed for meas delineation and ZnS surface passivatlon. ZnS was thermally evaporated from effusion cell in an ultra high vacuum (UHV) chamber. The main features of the ZnS deposited from effusion cell in UHV chamber are low fixed surface charge density, and small hysteresis. It was found that a negative flat band voltage with -0.6 V has been obtained for Metal Insulator Semiconductor (MIS) capacitor which was evaporated at $910^{\circ}C$ for 90 min. Current-Voltage (I-V) and temperature dependence of the I-V characteristics were measured in the temperature range 80 - 300 K. The Zero bias dynamic resistance-area product ($R_{0}A$) was about $7500{\Omega}-cm^{2}$ at room temperature. The physical mechanisms that dominate dark current properties in the HgCdTe photodiodes are examined by the dependence of the $R_{0}A$ product upon reciprocal temperature. From theoretical considerations and known current expressions for thermal and tunnelling process, the device is shown to be diffusion limited up to 180 K and g-r limited at temperature below this.