• Journal of the Korean Institute of Telematics and Electronics
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• v.12 no.5
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• pp.12-18
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• 1975

Triac phase controlled pre-regulator를 이용한 직류안정화전원에서 제어소자 전력소모를 촤소로 줄이기 위하여, 부하전류의 증가에 따라 제어소자 양단전압을 낮추어 주는 회로를 고안하여 부가하였다. 이렇게 하므로써 제어소자의 전력소모가 약 40%정도 감소되어 방열장치가 간단해지거나 전력용량을 증가할 수 있게 되었으며 열발산이 곤란한 monolithic I.C.화에 유용하도록 하였다. A method on minimizing the power dissipation in the control element of a series D.C. voltage regutator is devised. An additional control circuit which reduces the average voltage drop across the control element according to increasing the load current is attached :o the trial phase controlled pre-regulator system. It is verified that the power dissipation in the control element is reduced up to 40% by this. circuit arrangement. The heat sink system can be simplified and the capacity of tile handling power is also increased. It is expected that this circuit arrangement can be applied to I.C. fabrication.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.25 no.10
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• pp.786-790
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• 2012

A variety of diagnostic tests are widely applied in the field in industry to evaluate the condition of high voltage (HV) motor stator insulation. In this paper, the influence of temperature on the stator insulation diagnostic tests such as the insulation resistance, AC current, dissipation factor, and partial discharge measurements are studied and reported. The tests are performed with the HV motor stator winding temperature set between $40^{\circ}C$ to $80^{\circ}C$ in $10^{\circ}C$ intervals. It is shown that the AC current, dissipation factor, and partial discharge magnitude steadily increase with temperature, which suggests that temperature must be taken into account in the interpretation of the test results.

• Journal of information and communication convergence engineering
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• v.9 no.3
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• pp.301-304
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• 2011

This paper describes the possibility of a low-power, high-resolution fingerprint sensor chip. A modified capacitive detection circuit of charge sharing scheme is proposed, which reduces the static power dissipation and increases the voltage difference between a ridge and valley more than conventional circuit. The detection circuit is designed and simulated in 3.3V, 0.35${\mu}$m standard CMOS process, 40MHz condition. The result shows about 27% power dissipation reduction and 90% improvement of difference between a ridge and valley sensing voltage. The proposed circuit is more stable and effective than a typical circuit.

• The Journal of the Korea institute of electronic communication sciences
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• v.2 no.3
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• pp.163-167
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• 2007

In this paper, to design 8 bit RISC Microprocessor, a method of Clock Gating to reduce electric power consumption is proposed. In order to examine the priority, the comparison results of between a 8 bit Microprocessor which is not considered Low Power consumption and which is considered Low Power consumption using a methods of Clock Gating are represented. Within the a few periods, the results of comparing with a Microprocessor not considered the utilization of Clock Gating shows that the reduction of dynamic dissipation is minimized up to 21.56%.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2011.05a
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• pp.692-695
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• 2011

This paper describes the possibility of a low-power, high-resolution fingerprint sensor chip. A modified capacitive detection circuit of charge sharing scheme is proposed, which reduces the static power dissipation and increases the voltage difference between a ridge and valley more than conventional circuit. The detection circuit is designed and simulated in 3.3V, $0.35{\mu}m$ standard CMOS process, 40MHz condition. The result shows about 35% power dissipation reduction and 90% improvement of difference between a ridge and valley sensing voltage. The proposed circuit is more stable and effective than a typical circuit.

• Proceedings of the IEEK Conference
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• 2003.07b
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• pp.919-922
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• 2003

This paper presents a novel low power driving circuit for passive matrix organic lighting emitting diodes (OLED) displays. The proposed driving method for a low power OLED driving circuit which reduce large parasitic capacitance in OLED panel only use current driving method, instead of mixed mode driving method which uses voltage pre-charge technique. The driving circuit is implemented to one chip using 0.35${\mu}{\textrm}{m}$ CMOS process with 18V high voltage devices and it is applicable to 96(R.G.B)X64, 65K color OLED displays for mobile phone application. The maximum switching power dissipation of driving power dissipation is 5.7mW and it is 4% of that of the conventional driving circuit.

• ETRI Journal
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• v.35 no.2
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• pp.226-233
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• 2013

This paper presents a two-stage power-efficient class-AB operational transconductance amplifier (OTA) based on an adaptive biasing circuit suited to low-power dissipation and low-voltage operation. The OTA shows significant improvements in driving capability and power dissipation owing to the novel adaptive biasing circuit. The OTA dissipates only $0.4{\mu}W$ from a supply voltage of ${\pm}0.6V$ and exhibits excellent high driving, which results in a slew rate improvement of more than 250 times that of the conventional class-AB amplifier. The design is fabricated using $0.18-{\mu}m$ CMOS technology.

• JSTS:Journal of Semiconductor Technology and Science
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• v.12 no.3
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• pp.341-352
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• 2012

This paper presents a Processing Engine (PE) which is used in Low Density Parity Codec (LDPC) application with a novel charge-recovery logic called pseudo-NMOS boost logic (pNBL), to achieve high-speed and low power dissipation. pNBL is a high-overdriven and low area consuming charge recovery logic, which belongs to boost logic family. Proposed Processing Engine is used in LDPC circuit to reduce operating power dissipation and increase the processing speed. To demonstrate the performance of proposed PE, a test chip is designed and fabricated with 0.18 2m CMOS technology. Simulation results indicate that proposed PE with pNBL dissipates only 1 pJ/cycle when working at the frequency of 403 MHz, which is only 36% of PE with the conventional static CMOS gates. The measurement results show that the test chip can work as high as 609 MHz with the energy dissipation of 2.1 pJ/cycle.

• Journal of the Korean Geosynthetics Society
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• v.12 no.1
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• pp.83-92
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• 2013

Backfill material with thermal resistivity which has $50^{\circ}C$-cm/Watt in wet and $100^{\circ}C$-cm/Watt in dry is requested to improve the power transfer capability for dissipation of heat production in underground power cables. In the field test performed by buried cable backfills, the backfill material developed from this study is compared with river sand and weathered soil (native soil) to investigate the effect of heat transfer in various seasons and locations of thermal sensors. As a result, the developed backfill material is faster approaching yielding temperature (critical heat) than that of river sand and weathered soil, and it has good dissipation capacity rather than other materials by keeping moisture content at dry season.

• Journal of the Microelectronics and Packaging Society
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• v.21 no.3
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• pp.7-17
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• 2014

Power electronics modules are semiconductor components that are widely used in airplanes, trains, automobiles, and energy generation and conversion facilities. In particular, insulated gate bipolar transistors(IGBT) have been widely utilized in high power and fast switching applications for power management including power supplies, uninterruptible power systems, and AC/DC converters. In these days, IGBT are the predominant power semiconductors for high current applications in electrical and hybrid vehicles application. In these application environments, the physical conditions are often severe with strong electric currents, high voltage, high temperature, high humidity, and vibrations. Therefore, IGBT module packages involves a number of challenges for the design engineer in terms of reliability. Thermal and thermal-mechanical management are critical for power electronics modules. The failure mechanisms that limit the number of power cycles are caused by the coefficient of thermal expansion mismatch between the materials used in the IGBT modules. All interfaces in the module could be locations for potential failures. Therefore, a proper thermal design where the temperature does not exceed an allowable limit of the devices has been a key factor in developing IGBT modules. In this paper, we discussed the effects of various package materials on heat dissipation and thermal management, as well as recent technology of the new package materials.