• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.27 no.8
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• pp.497-500
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• 2014

In this paper, we analyze electrical characteristics of n/p-pillar layer according to trench angle which is the most important characteristics of SJ MOSFET and core process. Because research target is 600 V class SJ MOSFET, so conclusively trench angle deduced 89.5 degree to implement the breakdown voltage 750 V with 30% margin rate. we found that on resistance is $22mohm{\cdot}cm^2$ and threshold voltage is 3.5 V. Moreover, depletion layer of electric field distribution also uniformly distributes.

• Proceedings of the KIEE Conference
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• 2002.11a
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• pp.13-15
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• 2002

The trench MOSFET structure is characterized by reduced on-resistance due to elimination of $R_{JFET}$ and high packing density. An analytical calculation of Ron as the sum of $R_{ch}$ and $R_{epi}$ has been reported previously for the trench MOSFET structure. However, the accumulation layer resistance may not be neglected for Trench MOSFET especially for a relatively large value of the cell spacing, where a major contribution to Ron comes from Ra as the simulation results in this paper shows.

• Proceedings of the KIPE Conference
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• 2016.11a
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• pp.147-148
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• 2016

토템폴 구조는 브리지리스 부스트 역률보상회로 중에서도 저손실, 고효율, 저비용 그리고 낮은 전도 EMI의 특징으로 인해 많이 사용된다. 토템폴 구조의 역률보상 회로는 내부 다이오드의 역회복 문제로 인해 Si MOSFET을 이용한 전류연속모드 구동할 수 없어 전류 불연속 모드 혹은 임계 도통 모드로 동작시키는 것이 통상적이다. 본 논문에서는 역회복 문제를 해결해 전류연속모드 구동하기 위해 기존 Si MOSFET보다 낮은 역회복 전하(Qrr)와 역회복 시간(Trr)를 가지는 SiC MOSFET을 이용하여 토템폴 역률 보상 회로를 구현하고 이를 시뮬레이션과 실험을 통해 검증했다.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.28 no.4
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• pp.218-221
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• 2015

Power MOSFETs (metal oxide semiconductor field effect transistor) operate as energy control semiconductor switches. In order to reduce energy loss of the device during switch-on state, it is essential to increase its conductance. In this study we have investigated a structure to reduce the on-resistance characteristics of the MOSFET. We have a proposed MOSFET structure of active cells region buried under the gate pad. The measurement are carried out with a EDS to analyze electrical characteristics, and the proposed MOSFET are compared with the conventional MOSFET. The result of proposed MOSFET was 1.68[${\Omega}$], showing 10% improvement compared to the conventional MOSFET at 700[V].

• Journal of the Semiconductor & Display Technology
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• v.22 no.3
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• pp.155-160
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• 2023

The potential performance benefits of Silicon Carbide(SiC) MOSFETs in high power, high frequency power switching applications have been well established over the past 20 years. In the past few years, SiC MOSFET offerings have been announced by suppliers as die, discrete, module and system level products. In high-voltage SiC vertical devices, major design concerns is the edge termination and cell pitch design Field Limiting Rings(FLR) based structures are commonly used in the edge termination approaches. This study presents a comprehensive analysis of the impact of variation of FLR and JFET region on the performance of a 3.3 kV SiC MOSFET during. The improvement in MOSFET reverse bias by optimizing the field ring design and its influence on the nominal operating performance is evaluated. And, manufacturability of the optimization of the JFET region of the SiC MOSFET was also examined by investigating full-map electrical characteristics.

• Journal of Advanced Navigation Technology
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• v.18 no.4
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• pp.364-370
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• 2014

In this paper, high reliable trench formation technique and a novel fabrication techniques for trench gate MOSFET is proposed which is a key to expend application of power MOSFET in the future. Trench structure has been employed device to improve Ron characteristics by shrinkage cell pitch size in DMOSFET and to isolate power device part from another CMOS device part in some power integrated circuit. A new process method for fabricating very high density trench MOSFETs using mask layers with oxide spacers and self-align technique is realized. This technique reduces the process steps, trench width and source and p=body region with a resulting increase in cell density and current driving capability and decrease in on resistance.

• KIPE Magazine
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• v.25 no.6
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• pp.28-31
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• 2020

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.26 no.4
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• pp.284-288
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• 2013

Power MOSFETs(Metal Oxide Semiconductor Field Effect Transistor) operate as energy control semiconductor switches. In order to reduce energy loss of the device during switch-on state, it is essential to increase its conductance. We have experimental results and explanations on the doping profile dependence of the electrical behavior of the vertical MOSFET. The device is fabricated as $8.25{\mu}m$ cell pitch and $4.25{\mu}m$ gate width. The performances of device with various p base doping concentration are compared at Vth from 1.77 V to 4.13 V. Also the effect of the cell structure on the on-resistance and breakdown voltage of the device are analyzed. The simulation results suggest that the device optimized for various applications can be further optimized at power device.

• The Transactions of the Korean Institute of Power Electronics
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• v.25 no.3
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• pp.204-212
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• 2020

In this study, device suitability analysis is performed by comparing the performance of SiC MOSFET and GaN Transistor, which are WBG power semiconductor devices in the induction heating (IH) system. WBG devices have the advantages of low conduction resistance, switching losses, and fast switching due to their excellent physical properties, which can achieve high output power and efficiency in IH systems. In this study, SiC and GaN are applied to a general half-bridge series resonant converter topology to compare the conduction loss, switching loss, reverse conduction loss, and thermal performance of the device in consideration of device characteristics and circuit conditions. On this basis, device suitability in the IH system is analyzed. A half-bridge series resonant converter prototype using the SiC and GaN of a 650-V rating is constructed to verify device suitability through performance comparison and verified through an experimental comparison of power loss and thermal performance.

• The Transactions of the Korean Institute of Power Electronics
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• v.10 no.3
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• pp.274-281
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• 2005

A new resonant pulse converter for energy harvesting is proposed. The converter transfers energy from a low-voltage AC current to a battery. The low-voltage AC current source is an equivalent of the piezoelectric generator, which converts the mechanical energy to the electric energy. The converter consists of a full-bridge rectifier having four N-type MOSFETs and a boost converter haying N-type MOSFET and P-type MOSFET instead of diode. Switching of MOSFETs utilizes the capability of the $3^{rd}$ regional operation. The operational principles and switching method for the power control of the converter are investigated with the consideration of effects of the parasitic capacitances of MOSFETs. Simulation and experiment are performed to prove the analysis of the converter operation and to show the possibility of the $\mu$W energy harvesting.