• 융합정보논문지
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• 제9권3호
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• pp.75-81
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• 2019

본 논문은 유기물로 이루어진 폴리머 기판상에 저온 다결정 실리콘 박막트랜지스터 제조방법에 대해 연구하였다. 먼저, 폴리머 기판에 화학증착방식으로 비결정 실리콘 박막을 증착하였고, 열처리 장치인 퍼니스로 탈수소 및 활성화 공정을 430도에서 2시간동안 진행하였다. 이후 엑시머 레이저를 이용하여 결정화를 진행하여 다결정 실리콘 반도체 막을 제조하였다. 이 박막은 박막트랜지스터 제작을 위한 활성층으로 사용하였다. 제작된 p형 박막트랜지스터는 이동도 $77cm^2/V{\cdot}s$, on/off 전류비는 $10^7$이상의 동작특성을 보였고, 이는 결정화된 박막내부에 결함 농도가 낮음을 의미한다. 이 결과로 유기물 기판상에 엑시머 레이저로 형성된 다결정 실리콘으로 제작된 전자소자는 플렉서블 AMOLED 디스플레이 회로 형성에 최적의 기술임을 알 수 있다.

• 한국정보디스플레이학회:학술대회논문집
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• 한국정보디스플레이학회 2009년도 9th International Meeting on Information Display
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• pp.957-960
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• 2009

Sensor applications of thin-film transistors (TFTs), such as photosensor, magnetic sensor, temperature sensor and chemical sensor, are introduced. Active-matrix circuits and amplifying circuits using poly-Si TFTs are integrated with these sensors to improve sensor performances and generate additional functions. These sensors may be promising applications after flat-panel displays (FPDs) in giant-micro electronics.

• 한국진공학회:학술대회논문집
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• 한국진공학회 2015년도 제49회 하계 정기학술대회 초록집
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• pp.194.1-194.1
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• 2015

Transition metal dichalcogenide (TMD) with layered structure, has recently been considered as promising candidate for next-generation flexible electronic and optoelectronic devices because of its superior electrical, optical, and mechanical properties.[1] Scalability of thickness down to a monolayer and van der Waals expitaxial structure without surface dangling bonds (consequently, native oxides) make TMD-based thin film transistors (TFTs) that are immune to the short channel effect (SCE) and provide very high field effect mobility (${\sim}200cm^2/V-sec$ that is comparable to the universal mobility of Si), respectively.[2] In addition, an excellent photo-detector with a wide spectral range from ultraviolet (UV) to close infrared (IR) is achievable with using $WSe_2$, since its energy bandgap varies between 1.2 eV (bulk) and 1.8 eV (monolayer), depending on layer thickness.[3] However, one of the critical issues that hinders the successful integration of $WSe_2$ electronic and optoelectronic devices is the lack of a reliable and controllable doping method. Such a component is essential for inducing a shift in the Fermi level, which subsequently enables wide modulations of its electrical and optical properties. In this work, we demonstrate n-doping method for $WSe_2$ on poly-4-vinylphenol and poly (melamine-co-formaldehyde) (PVP/PMF) insulating layer and adjust the doping level of $WSe_2$ by controlling concentration of PMF in the PVP/PMF layer. We investigated the doping of $WSe_2$ by PVP/PMF layer in terms of electronic and optoelectronic devices using Raman spectroscopy, electrical measurements, and optical measurements.

• 한국정보디스플레이학회:학술대회논문집
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• 한국정보디스플레이학회 2007년도 7th International Meeting on Information Display 제7권2호
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• pp.1071-1074
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• 2007

6Mask CMOS process in low temperature polycrystalline silicon thin film transistors (poly-Si TFTs) has been developed and verified by manufacturing a 6Mask CMOS AMLCD panel. The novel 6Mask CMOS process is realized by eliminating the storage mask, gate mask and via open mask of conventional structure.

• 한국정보디스플레이학회:학술대회논문집
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• 한국정보디스플레이학회 2007년도 7th International Meeting on Information Display 제7권2호
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• pp.1085-1088
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• 2007

A new DC-DC converter was designed for gate driver circuit using low temperature poly-Si TFT technology. To achieve high efficiency and small area, we proposed a cross-coupled type DC-DC converter which converts 5V of input voltage to 9V of output voltage and supplies 120$\mu$A of current to load. Its efficiency is 92.9% and the area is reduced as much as 19% compared to the previously reported latch type DC-DC converter.

• 한국정보디스플레이학회:학술대회논문집
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• 한국정보디스플레이학회 2006년도 6th International Meeting on Information Display
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• pp.505-508
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• 2006

Self-heating induced device degradation and its width/length (W/L) dimension dependence were studied in p-type polycrystalline silicon (poly-Si) thin film transistors (TFTs). Negative channel conductance was observed under high power region of output curve, which was mainly caused by hole trapping into gate oxide and also by trap state generation by self-heating effect. Self-heating effect became aggravated as W/L ratio was increased, which was understood by the differences in heat dissipation capability. By reducing applied power density normalized to TFT area, self-heating induced degradation could be reduced.

• 한국정보디스플레이학회:학술대회논문집
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• 한국정보디스플레이학회 2006년도 6th International Meeting on Information Display
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• pp.1243-1246
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• 2006

A new source follower circuit for the integrated circuit of AMLCDs is proposed. Active load is added and calibration operation is applied to compensate the circuits. Proposed circuit is capable of minimizing the variation from both timing and device variations through measured results, the uniformity and bias effect are discussed.

• 한국정보디스플레이학회:학술대회논문집
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• 한국정보디스플레이학회 2006년도 6th International Meeting on Information Display
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• pp.1287-1290
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• 2006

A high speed analog buffer using polycrystalline silicon (poly-Si) thin film transistors (TFT) is proposed for 2.2-inch quarter video graphic adapter (qVGA) TFT-LCD panel. Simulation results show that the settling time of the proposed circuit is $10{\mu}sec$ in 2.2-inch qVGA and the power consumption of proposed analog buffer is $25{\mu}W$.

• 전자공학회논문지A
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• 제33A권3호
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• pp.96-106
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• 1996

One of the major problems for poly-Si TFTs is the large off state leakage current. LDD (lightly doped drain) and offset gated structures have been employed in order to reduce the leakage current. However, these structures also redcue the oN current significantly due to the extra series resistance caussed by the LDD or offset region. It is desirable to have a device which would have the properties of the offset gated structure in the OFF state, while behaving like a fully gated device in the oN state. Therefore, we propose a new thin film transistor with pnp junction gate which reduce the leakage curretn during the OFF state without sacrificing the ON current during the ON state.

• 대한전기학회:학술대회논문집
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• 대한전기학회 2002년도 추계학술대회 논문집 전기물성,응용부문
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• pp.130-133
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• 2002

엑시머 레이저를 이용한 저온($450^{\circ}C$ 이하) 다결정 실리콘 박막 트랜지스터 제작 시, 소오스/드레인 이온 주입에 의한 실리콘 박막의 격자 손상은 엑시머 레이저 어닐링(Excimer Laser Annealing; ELA) 방법으로 치유한다. 그러나 게이트 전극 모서리에서의 레이저광 회절 현상으로 인해 소오스/드레인 접합부에 도달하는 레이저 에너지 밀도가 감소하여 다량의 결정 결함이 치유되지 못한 채 남게 된다. 이러한 결정 결함은 박막 트랜지스터의 전계 효과 이동도를 저하시키는 요인이 된다. 새롭게 제안한 사선 입사 엑시머 레이저 어닐링(Oblique Incidence Excimer Laser Annealing; OI-ELA) 방법으로 소오스/드레인 접합부의 결정 결함을 제거하고 다결정 박막 트랜지스터의 특성을 향상시켰다.