• Title/Summary/Keyword: p-MOS

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Effect of Rapid Thermal Annealing and Orientation of Si Substrate on Structural and Electrical Properties of MOCVD-grown TiO2 Thin Films (급속 후 열처리 및 실리콘기판 배향에 따른 MOCVD-TiO2박막의 구조적.전기적 특성)

  • 왕채현;최두진
    • Journal of the Korean Ceramic Society
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    • v.35 no.1
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    • pp.88-96
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    • 1998
  • The structural and electrical properties of titanium dioxide(TiO2) thin films deposited on p-type (100) si and 4$^{\circ}$off(100) Si substartes by metalorganic chemical vapor deposition (MOCVD) have been studied with post rapid thermal annealing. TiO2 thin films of anatase phase were grown at 300-500$^{\circ}C$ using titanium post rapid thermal annealing at a temperature of 800$^{\circ}C$ for 30sec. rutile phase was observed in the condition of the deposition temperature over 350$^{\circ}C$ in the ambient air atmosphere and at 500$^{\circ}C$ in cacuu,. SEM and AFM study show-ed surface roughness were increased slightly from 40${\AA}$to 55${\AA}$ after annealing due to grain growth and phase transformation. From capacitane-voltage measurement of Al/TiO2./p-Si structure after annealing we obtained ideal capacitance-voltage characteristics of MOS structure with dielectric constant of 16-22 in case of (100) Si and about 30- in case of 4$^{\circ}$off(100) Si but showed the higher leakage current.

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Electrical Characteristics of the Dual Gate Emitter Switched Thyristor (Dual Gate Emitter Switched Thyristor의 전기적 특성)

  • Kim, Nam-Soo;Lee, Eung-Rae;Cui, Zhi-Yuan;Kim, Yeong-Seuk;Kim, Kyoung-Won;Ju, Byeong-Kwon
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.18 no.5
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    • pp.401-406
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    • 2005
  • Two dimensional MEDICI simulator is used to study the electrical characteristics of Dual Gate Emitter Switched Thyristor. The simulation is done in terms of the current-voltage characteristics with the variations of p-base impurity concentrations and current flow. Compared with the other power devices such as MOS Controlled Cascade Thyristor(MCCT), Conventional Emitter Switched Thyristor(C-EST) and Dual Channel Emitter Switched Thyristor(DC-EST), Dual Gate Emitter Switched Thyristor(DG-EST) shows to have tile better electrical characteristics, which is the high latch-up current density and low forward voltage-drop. The proposed DG-EST which has a non-planer u-base structure under the floating N+ emitter indicates to have the better characteristics of latch-up current and breakover voltage in spite of the same turn-off characteristics.

The Characteristics Analysis of GIDL current due to the NBTI stress in High Speed p-MOSFET (고속용 p-MOSFET에서 NBTI 스트레스에 의한 GIDL 전류의 특성 분석)

  • Song, Jae-Ryul;Lee, Jong-Hyung;Han, Dae-Hyun;Lee, Yong-Jae
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.13 no.2
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    • pp.348-354
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    • 2009
  • It has analyzed that the device degradation by NBTI (Negative Bias Temperature Instability) stress induced the increase of gate-induced-drain-leakage(GIDL) current for p-MOSFETs. It is shown that the degradation magnitude, as well as its time, temperature, and field dependence, is govern by interface traps density at the silicon/oxide interface. from the relation between the variation of threshold voltage and subthreshold slope, it has been found that the dominant mechanism for device degradation is the interface state generation. From the GIDL measurement results, we confined that the EHP generation in interface state due to NBTI stress led to the increase of GIDL current. Therefore, one should take care of the increased GIDL current after NBTI stress in the ultra-thin gate oxide device. Also, the simultaneous consideration of reliability characteristics and dc device performance is highly necessary in the stress engineering of nanoscale CMOSFETs.

A Perceptual Rate Control Algorithm with S-JND Model for HEVC Encoder (S-JND 모델을 사용한 주관적인 율 제어 알고리즘 기반의 HEVC 부호화 방법)

  • Kim, JaeRyun;Ahn, Yong-Jo;Lim, Woong;Sim, Donggyu
    • Journal of Broadcast Engineering
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    • v.21 no.6
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    • pp.929-943
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    • 2016
  • This paper proposes the rate control algorithm based on the S-JND (Saliency-Just Noticeable Difference) model for considering perceptual visual quality. The proposed rate control algorithm employs the S-JND model to simultaneously reflect human visual sensitivity and human visual attention for considering characteristics of human visual system. During allocating bits for CTU (Coding Tree Unit) level in a rate control, the bit allocation model calculates the S-JND threshold of each CTU in a picture. The threshold of each CTU is used for adaptively allocating a proper number of bits; thus, the proposed bit allocation model can improve perceptual visual quality. For performance evaluation of the proposed algorithm, the proposed algorithm was implemented on HM 16.9 and tested for sequences in Class B and Class C under the CTC (Common Test Condition) RA (Random Access), Low-delay B and Low-delay P case. Experimental results show that the proposed method reduces the bit-rate of 2.3%, and improves BD-PSNR of 0.07dB and bit-rate accuracy of 0.06% on average. We achieved MOS improvement of 0.03 with the proposed method, compared with the conventional method based on DSCQS (Double Stimulus Continuous Quality Scale).

A $64\times64$ IRFPA CMOS Readout IC for Uncooled Thermal Imaging (비냉각 열상장비용 $64\times64$ IRFPA CMOS Readout IC)

  • 우회구;신경욱;송성해;박재우;윤동한;이상돈;윤태준;강대석;한석룡
    • Journal of the Korean Institute of Telematics and Electronics C
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    • v.36C no.5
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    • pp.27-37
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    • 1999
  • A CMOS ReadOut Integrated Circuit (ROlC) for InfraRed Focal Plane Array (IRFPA) detector is presented, which is a key component in uncooled thermal imaging systems. The ROIC reads out signals from $64\times64$ Barium Strontium Titanate (BST) infrared detector array, then outputs pixel signals sequentially after amplifying and noise filtering. Various design requirements and constraints have been considered including impedance matching, low noise, low power dissipation and small detector pitch. For impedance matching between detector and pre~amplifier, a new circuit based on MOS diode structure is devised, which can be easily implemented using standard CMOS process. Also, tunable low pass filter with single~pole is used to suppress high frequency noise. In additions, a clamping circuit is adopted to enhance the signal~to-noise ratio of the readout output signals. The $64\times64$ IRFPA ROIC is designed using $0.65-\mu\textrm{m}$ 2P3M (double poly, tripple metal) N~Well CMOS process. The core part of the chip contains 62,000 devices including transistors, capacitors and resistors on an area of about $6.3-mm\times6.7-mm$.

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Design of an Energy Management System for On-Chip Solar Energy Harvesting (온칩 태양 에너지 하베스팅을 위한 에너지 관리 시스템 설계)

  • Jeon, Ji-Ho;Lee, Duck-Hwan;Park, Joon-Ho;Park, Jong-Tae;Yu, Chong-Gun
    • Journal of the Institute of Electronics Engineers of Korea SC
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    • v.48 no.2
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    • pp.15-21
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    • 2011
  • In this paper, an energy management circuit for solar energy harvesting system is designed in $0.35{\mu}m$ CMOS technology. The solar energy management system consists of an ISC(Integrated Solar Cell), a voltage booster, and an MPPT(Maximum Power Point Tracker) control unit. The ISC generates an open circuit voltage of 0.5V and a short circuit current of $15{\mu}A$. The voltage booster provides the following circuit with a supply voltage about 1.5V. The MPPT control unit turns on the pMOS switch to provide the load with power while the ISC operates at MPP. The SEMU(Solar Energy Management Unit) area is $360{\mu}m{\times}490{\mu}m$ including pads. The ISC area is $500{\mu}m{\times}2000{\mu}m$. Experimental results show that the designed SEMU performs proper MPPT control for solar energy harvested from the ISC. The measured MPP voltage range is about 370mV∼420mV.

0.35㎛ CMOS Low-Voltage Low-Power Voltage and Current References (0.35㎛ CMOS 저전압 저전력 기준 전압 및 전류 발생회로)

  • Park, Chan-yeong;Hwang, Jeong-Hyeon;Jo, Min-Su;Yang, Min-jae;Yoon, Eun-jung;Yu, Chong-gun
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2015.10a
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    • pp.458-461
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    • 2015
  • In this paper 2 types of voltage references and a current reference suitable for low-voltage, low-power circuits are proposed and designed with $0.35{\mu}m\;CMOS$ process. MOS transistors operating in weak inversion and bulk-driven technique are utilized to achieve low-voltage and low-power features. The first voltage reference consumes 1.43uA from a supply voltage of 1.2V while it has a reference voltage of 585mV and a TC(Temperature Coefficient) of $6ppm/^{\circ}C$. The second voltage reference consumes 48pW from a supply voltage of 0.3V while having a reference voltage of 172mV and a TC of $26ppm/^{\circ}C$. The current reference consumes 246nA from a supply voltage of 0.75V with a reference current of 32.6nA and a TC of $262ppm/^{\circ}C$. The performances of the designed references have been verified through simulations.

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Effects of Initial Body Weight and Synbiotics Supplementation on Growth Performance of Weaned Pigs (개시체중과 Synbiotics 첨가가 이유자돈의 성장에 미치는 영향)

  • Seok Hee Lee;Su hyup Lee;Jin Ki Park;Jee Hwan Choe
    • Journal of Practical Agriculture & Fisheries Research
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    • v.25 no.4
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    • pp.53-59
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    • 2024
  • The purpose of the study was to examine the effects of initial body weight and synbiotics supplementation in the diet on growth performance of weaned pigs. A total of 80 crossbred pigs (Landrace×Yorkshire×Duroc, d 28±3, body weight 6.40±1.70 kg) were randomly distributed 4 treatments (4 replication, 5 pigs/replication). The treatments were 1) high initial body weight group (PC), 2) low initional body weight group (NC), 3) low initial body weight with 0.2% antibiotics (amoxicillin) supplementaion group (AB), 4) low initial body weight with 0.2% synbiotics (AllTech® Bio-Mos 0.3%, 0.3%, Bacillus subtillis 0.1%, formic acid 0.1%) supplementation group (Syn). AllTech® Bio-Mos is consist of at least 25% of glucomannanprotein extracted from the cell wall of Saccaromycess cerevisae. Growth performance was measured during 28 d. Average daily gain (ADG) of AB and Syn groups were significantly (p<0.05) higher than that of NC group. However, final body weight at the end of experiment were not different among NC, AB, and Syn groups. Initial body weight and final body weight of PC group were statistically (p<0.001) higher compared to those of other groups. Additionally, PC showed the tendency of lower average daily feed intake and higher ADG, thereby lower feed conversion ratio compared with other groups. Therefore, the current results imply that supplementation of antibiotics and synbiotics in diets for weaned pigs could not catch up with significant differences in initial body weight.

A Novel Approach to a Robust A Priori SNR Estimator in Speech Enhancement (음성 향상에서 강인한 새로운 선행 SNR 추정 기법에 관한 연구)

  • Park, Yun-Sik;Chang, Joon-Hyuk
    • The Journal of the Acoustical Society of Korea
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    • v.25 no.8
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    • pp.383-388
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    • 2006
  • This Paper presents a novel approach to single channel microphone speech enhancement in noisy environments. Widely used noise reduction techniques based on the spectral subtraction are generally expressed as a spectral gam depending on the signal-to-noise ratio (SNR). The well-known decision-directed(DD) estimator of Ephraim and Malah efficiently reduces musical noise under the background noise conditions, but generates the delay of the a prioiri SNR because the DD weights the speech spectrum component of the Previous frame in the speech signal. Therefore, the noise suppression gain which is affected by the delay of the a priori SNR, which is estimated by the DD matches the previous frame rather than the current one, so after noise suppression. this degrades the noise reduction performance during speech transient periods. We propose a computationally simple but effective speech enhancement technique based on the sigmoid type function for the weight Parameter of the DD. The proposed approach solves the delay problem about the main parameter, the a priori SNR of the DD while maintaining the benefits of the DD. Performances of the proposed enhancement algorithm are evaluated by ITU-T p.862 Perceptual Evaluation of Speech duality (PESQ). the Mean Opinion Score (MOS) and the speech spectrogram under various noise environments and yields better results compared with the fixed weight parameter of the DD.

Preparation of Birnessite (δ-MnO2) from Acid Leaching Solution of Spent Alkaline Manganese Batteries and Removals of 1-naphthol (폐 알칼리망간전지의 산 침출액으로부터 버네사이트(δ-MnO2)의 제조 및 1-naphthol 제거)

  • Eom, Won-Suk;Lee, Han-Saem;Rhee, Dong-Seok;Shin, Hyun-Sang
    • Journal of Korean Society of Environmental Engineers
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    • v.38 no.11
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    • pp.603-610
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    • 2016
  • This work studies the synthesis of birnessite (${\delta}-MnO_2$), a catalyst of oxidative-coupling reactions, from the powder of spent alkaline manganese batteries (SABP, <8 mesh) and evaluate its reactivity for 1-naphthol (1-NP) removals. Manganese oxides using commercial reagents ($MnSO_4$, $MnCl_2$) and the acid birnessite (A-Bir) by McKenzie method were also synthesized, and their crystallinity and reactivity for 1-NP were compared with one another. 96% Mn and 98% Zn were extracted from SABP by acid leaching at the condition of solid/liquid (S/L) ratio 1:10 in $1.0M\;H_2SO_4+10.5%\;H_2O_2$ at $60^{\circ}C$. From the acid leaching solution, 69% (at pH 8) and 94.3% (pH>13) of Mn were separated by hydroxide precipitation. Optimal OH/Mn mixing ratio (mol/mol) for the manganese oxide (MO) synthesis by alkaline (NaOH) hydrothermal techniques was 6.0. Under this condition, the best 1-NP removal efficiency was observed and XRD analysis confirmed that the MOs are corresponding to birnessite. Kinetic constants (k, at pH 6) for the 1-NP removals of the birnessites obtained from Mn recovered at pH 8 (${Mn^{2+}}_{(aq)}$) and pH>13 ($Mn(OH)_{2(s)}$) are 0.112 and $0.106min^{-1}$, respectively, which are similar to that from $MnSO_4$ reagent ($0.117min^{-1}$). The results indicated that the birnessite prepared from the SABP as a raw material could be used as an oxidative-coupling catalyst for removals of trace phenolic compounds in soil and water, and propose the recycle scheme of SAB for the birnessite synthesis.