Electrical Characteristics of the Dual Gate Emitter Switched Thyristor |
Kim, Nam-Soo
(충북대학교 전지전자공학부)
Lee, Eung-Rae (충북대학교 전지전자공학부) Cui, Zhi-Yuan (충북대학교 전지전자공학부) Kim, Yeong-Seuk (충북대학교 전지전자공학부) Kim, Kyoung-Won (하이닉스반도체) Ju, Byeong-Kwon (고려대학교 전기공학과) |
1 | Mohan, Undeland, and Robbins, 'Power Electronics', Wiley, 2nd ed., p, 505, 1995 |
2 | B. J. Baliga, 'Trends in power semiconductor device', IEEE Electron Device, Vol. 43, No. 10, p. 1717, 1996 |
3 | B. J. Baliga, M. S. Adler, P. V. Gray, R. Love, and N. Zommer, 'The Insulated Gate Transistor', IEEE Int. Electron Devices Meeting Dig., p. 264, 1982 |
4 | 정태웅, 오정근, 이기영, 주병권, 김남수, '수평 구조의 MOS-controlled thyristor에서 채널길이 및 불순물 농도에 의한 Anode 전류 특성', 전기전자재료학회논문지, 17권, 10호, p. 1034, 2004 |
5 | M. S. Shekar, B. J. Baliga, M. Nandakumar, S. Tandon, and A. Reisman, 'Characteristics of the emitter switched thyristor', IEEE Trans. Electron Devices, Vol. 38, No.7, p. 1619, 1991 |
6 | N. Iwamuro, M. S. Shekar, and B. J. Baliga, 'A Study of EST's Short Circuit SOA', in Proc. IEEE Int. Symp, Power Semiconductor Devices and IC's, p. 71, 1993 |
7 | J. S. Ajit, 'A new insulated-gate thyristor with turn-off achieved by controlling the base-resistance', IEEE Electron Device Lett., Vol. 16, No.9, p. 411, 1995 |
8 | S. Sridhar and B. J. Baliga, 'The dual gate emitter sitched thyristor (DG-EST)', IEEE Electron Device Lett., Vol. 17, No.1, p. 25, 1996 |
9 | S. Sawant, S. Sridhar, and B. J. Baliga, 'The dual gate EST: a new MOS-gated thyristor structure', '96 ISPSD, p. 125, 1996 |
10 | B. J. Baliga, Power Semiconductor Devices, PWS Publing Company, 1996 |
11 | 변대석, 이병훈, 한민구, 최연익, '스냅-백 현상이 억제된 새로운 구조의 Emitter switch ed thyristor', 전기학회논문지, 46권,11호, p. 1623, 1997 |
12 | N. Iwamuro, T. Iwaana. Y. Harada, Y. Onozawa, and Y. Seki, 'A New Concept for High Voltage MCCT with no J- FET Resistance by using a very Thin Wafer', Electron Devices Meeting Dig., p. 351, 1997 |