• 한국전기전자재료학회:학술대회논문집
• /
• 한국전기전자재료학회 2001년도 추계학술대회 논문집
• /
• pp.126-129
• /
• 2001

A p-n junction was obtained by the deposition of an n-type ZnO thin film on a p-type Zn-doped InP substrate. The Zn-doped InP substrate has been made by the diffusion of Zn with sealed ampoule technique. The ZnO deposition process ws performed by pulsed laser deposition (PLD). The p-n junction was formed and showed a typical I-V characteristic. We will also discuss about the realization of an ultraviolet light-emitting diode (LED). The structure of n-ZnO/p-Zn-doped InP could be a good candidate for the realization of an ultraviolet light-emitting diode or an ultraviolet laser diode.

• 전자공학회논문지A
• /
• 제32A권2호
• /
• pp.89-95
• /
• 1995

The structure of boron ion-implanted pn junctio in the vacancy-doped p-type HgCdTe was investigated with the differential Hall measurement. The as-implanted junction showed the electron concentration as high as 1${\times}10^{18}/cm^{3}$ and the junction depth of 0.6.mu.m. When the HgCdTe junction was heated in oven, the electron concentration near the junction decreased and the junction depth increased as the annealing temperature and time increased. The junction structure after the thermal annealing was n$^{+}$/n$^{-}$/p. For the 200.deg. C 20min annealed sample, the electron mobility was 10$^{4}cm^{2}/V{\cdot}$s near the surface(n$^{+}$), and was larger thatn 10$^{5}cm^{2}/V{\cdot}$s near the junction(n$^{+}$). The junction formation mechanism is conjectured as follows. When HgCdTe is ion-implanted, the ion energy generates crystal defecis and displaced Hg atoms HgCdTe is ion-implanted, the ion energy generates crystal defecis and displaced Hg atoms near the surface. The displaced Hg vacancies diffuse in easily by the thernal treatment and a fill the Hg vacancies in the p-HgCdTe substrate. With the Hg vacancies filled completely, the GfCdTe substrate becomes n-type because of the residual n-type impurity which was added during the wafer growing. Therefore, the n$^{+}$/n$^{-}$/p regions are formed by crystal defects, residual impurities, and Hg vacancies, respectively.

• Journal of Power Electronics
• /
• 제12권1호
• /
• pp.19-23
• /
• 2012

This paper presents a practical methodology for realistic simulation on reverse characteristics of Wide Bandgap (WBG) SiC and GaN p-n junctions. The adjustment on certain physic-based model parameters, such as the trap density and photo-generation for SiC junction, and impact ionization coefficients and critical field for GaN junction are described. The adjusted parameters were used in Synopsys Medici simulation to obtain a realistic p-n junction avalanche breakdown voltage. The simulation results were verified through benchmarking against independent data reported by others.

• Transactions on Electrical and Electronic Materials
• /
• 제3권1호
• /
• pp.1-3
• /
• 2002

A p-n junction was obtained by the deposition of an n-type ZnO thin film on a p-type Zn-doped InP substrate. The Zn-doped InP substrate has been made by the diffusion of Zn with sealed ampoule technique. The ZnO deposition process was performed by pulsed laser deposition (PLD). The p-n junction was formed and showed typical I-V characteristics. We will also discuss about the realization of an ultraviolet light-emitting diode (LED). The structure of n-ZnO/p-Zn-doped InP could be a good candidate for the realization of an ultraviolet light-emitting diode or an ultraviolet laser diode.

• 전자공학회논문지D
• /
• 제35D권5호
• /
• pp.87-92
• /
• 1998

Ultr shallow p$^{+}$-n junction with Co/Ti bilayer silicidde contact was formed by ion implantation of BF$_{2}$ [energy : (30, 50)keV, dose:($5{\times}10^{14}$, $5{\times}10^{15}$/$\textrm{cm}^2$] onto the n-well Si(100) region and by RTA-silicidation and post annealing of the evaporated Co(120.angs., 170.angs.)/Ti(40~50.angs.) double layer. The sheet resistance of the silicided p$^{+}$ region of the p$^{+}$-n junction formed by BF2 implantation with energy of 30keV and dose of $5{\times}10^{15}$/$\textrm{cm}^2$ and Co/Ti thickness of $120{\AA}$/(40~$50{\AA}$) was about $8{\Omega}$/${\box}$. The junction depth including silicide thickness of about $500{\AA}$ was 0.14${\mu}$. The fabricated p$^{+}$ -n ultra shallow junction depth including silicide thickness of about $500{\AA}$ was 0.14${\mu}$. The fabricated p$^{+}$-n ultra shallow junction with Co/Ti bilayer silicide contact did not show any agglomeration or variation of sheet resistance value after post annealing at $850^{\circ}C$ for 30 minutes. The boron concentration at the epitaxial CoSi$_{2}$/Si interface of the fabricated junction was about 6*10$6{\times}10^{19}$ / $\textrm{cm}^2$./TEX>.

• E2M - 전기 전자와 첨단 소재
• /
• 제8권6호
• /
• pp.737-743
• /
• 1995

Two step RTD(Rapid Thermal Diffussion) of P into silicon wafer using tungsten halogen lamp was used to fabricated very shallow n$^{+}$p junction. 1st RTD was performed in the temperature range of 800.deg. C for 60 see and the heating rate was in the 50.deg. C/sec. Phosphrous solid source was transfered on the silicon surface. 2nd RTD process was performed in the temperature range 1050.deg. C, 10sec. Using 2 step RTD we can obtain a shallow junction 0.13.mu.m in depth. After RTD, the Ti-silicide process was performed by the two step RTA(Rapid Thermal Annealing) to reduced the electric resistance and to improve the n$^{+}$p junction diode. The titanium thickness was 300.angs.. The condition of lst RTA process was 600.deg. C of 30sec and that of 2nd RTA process was varied in the range 700.deg. C, 750.deg. C, 800.deg. C for 10sec-60sec. After 2 step RTA, sheet resistance was 46.ohm../[]. Ti-silicide n+p junction diode was fabricated and I-V characteristics were measured.red.

• 대한전기학회논문지:전기물성ㆍ응용부문C
• /
• 제55권2호
• /
• pp.72-75
• /
• 2006

A CMOS compatible Super Junction LDMOS (SJ-LDMOS) structure, which reduces substrate-assisted depletion effects, is reported. The proposed structure uses a N-buffer layer between the pillars and P-substrate to achieve global charge balance between the pillars, the N-buffer layer and the P-substrate. The new structure features high breakdown voltage, low on-resistance, and reduced sensitivity to doping imbalance in the pillars.

• 전자공학회논문지A
• /
• 제29A권2호
• /
• pp.68-76
• /
• 1992

Concurrent Junction process (simultaneous formation of a silicide and a junction on the implanted substrate) by Rapid Thermal Annealig has been investigated. Electrical and material properties of CoSi$_2$ films were analyzed with Alpha Step, 4-point probe, X-ray diffraction(XRD) and Scanning Electron Microscope(SEM). And CoSi$_2$ junctions were examined with Spreading Resistance probe in order to see the redistribution of electrically activated dopants and determined the junction depth. Two step annealing process, which was 80$0^{\circ}C$ for 30sec and 100$0^{\circ}C$ for 30sec in NS12T ambient was employed to form CoSi$_2$ and shallow junctions. Resistivity of CoSi$_2$ was turned out to be 11-15${\mu}$cm and shallow junctions less than 0.1$\mu$m were successfully formed by the process. It was found that the dopant concentration at CoSi$_2$/Si interface increased as decreasing the thickness of Co films in case of $p^{+}/n$ and $n^{+}/p$ junctions while the junction depth decreased as increasing CoSiS12T thickness in case of $p^{+}/n$ junction.

• 전기의세계
• /
• 제13권3호
• /
• pp.13-20
• /
• 1964

The measurements of X-ray and Gamma-ray Dose Rate have been successfully made by measuring the short circuit current of the Silicon P-N Junction Diode being irradiated. The short circuit current flows when a silicon P-N Junction Diode is irradiated by X-ray of Gammaray radiations due to photovoltaic effect. A brief analysis is given in order to verify the proportionality of a short circuit current to the Dose Rate. Using this method, measurements of X-ray Dose Rate were carried out in the range of 0.05-1600 r/m successfully. The calibration was made by comparing with Victoreen condenser r-meter. Some advantages in this Dose Rate meter over a condenser r-meter were found. One can measure a continous variation of X-ray Dose Rate with this rate meter at the control console of X-ray device.

• 전기의세계
• /
• 제20권2호
• /
• pp.9-14
• /
• 1971

N type single crystal CdTe is grown by doping Gallium as 0.01 percent, by using zone melting method. And also p type CdTe is grown by doping Ag, Sb, and Te as 0.01%. Resistivity and Concentration of the n.p type single crystal are measured. And then Li ions are implanted on the n type CdTe by high voltage accellerator with different amount of impurity. Indium is evaporated on the p type in high vacuum condition. These sample are heated so as to make P-N Junction in Argon gas flow. Electrical properties for solar cell are investigated. Photovoltage and current are found to be varyed according to following factor: 1) amount of impurity 2) diffusion thickness 3) temperature and time for making P-N junction. Efficiency of the P-N Junction evaporated Indium is 6.5 when it is heated at 380.deg. C for 15 minutie.