• Journal of the Institute of Electronics Engineers of Korea SD
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• v.46 no.8
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• pp.61-70
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• 2009

A 10b 30MS/s pipelined ADC operating under 1V power supply is presented. It utilizes a switched-RC based input sampling circuit and a resistive loop to reset the feedback capacitor in the multiplying digital-to-analog converter (MDAC) for the low-voltage operation. Cascaded switched-RC branches are used to achieve accurate grain of the MDAC for the first stage and separate switched-RC circuits are used in the sub-ADC to suppress the switching noise coupling to the MDAC input The measured differential and integral non-linearities of the prototype ADC fabricated in a 0.13${\mu}m$, CMOS process are less than 0.54LSB and 1.75LSB, respectively. The prototype ADC achieves 54.1dB SNDR and 70.4dB SFDR with 1V supply and 30MHz sampling frequency while consuming 17mW power.

• The Journal of Korea Institute of Information, Electronics, and Communication Technology
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• v.13 no.1
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• pp.8-16
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• 2020

In this paper, a single-bit 2nd-order delta-sigma modulator with the architecture of cascaded-of-integrator feedforward (CIFF) is proposed for column-parallel analog-to-digital converter (ADC) array used in a low noise CMOS image sensor. The proposed modulator implements two switched capacitor integrators and a single-bit comparator within only 10-㎛ column-pitch for column-parallel ADC array. Also, peripheral circuits for driving all column modulators include a non-overlapping clock generator and a bias circuit. The proposed delta-sigma modulator has been implemented in a 110-nm CMOS process. It achieves 88.1-dB signal-to-noise-and-distortion ratio (SNDR), 88.6-dB spurious-free dynamic range (SFDR), and 14.3-bit effective-number-of-bits (ENOB) with an oversampling ratio (OSR) of 418 for 12-kHz bandwidth. The area and power consumption of the delta-sigma modulator are 970×10 ㎛2 and 248 ㎼, respectively.

• ETRI Journal
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• v.36 no.5
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• pp.714-720
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• 2014

In this paper, we propose the use of data-driven probabilistic utterance-level decision logic to improve Weighted Finite State Transducer (WFST)-based endpoint detection. In general, endpoint detection is dealt with using two cascaded decision processes. The first process is frame-level speech/non-speech classification based on statistical hypothesis testing, and the second process is a heuristic-knowledge-based utterance-level speech boundary decision. To handle these two processes within a unified framework, we propose a WFST-based approach. However, a WFST-based approach has the same limitations as conventional approaches in that the utterance-level decision is based on heuristic knowledge and the decision parameters are tuned sequentially. Therefore, to obtain decision knowledge from a speech corpus and optimize the parameters at the same time, we propose the use of data-driven probabilistic utterance-level decision logic. The proposed method reduces the average detection failure rate by about 14% for various noisy-speech corpora collected for an endpoint detection evaluation.

• International Journal of Control, Automation, and Systems
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• v.6 no.6
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• pp.859-872
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• 2008

In this paper, the problem of partial asymptotic stabilization of nonlinear control cascaded systems with integrators is considered. Unfortunately, many controllable control systems present an anomaly, which is the non complete stabilization via continuous pure-state feedback. This is due to Brockett necessary condition. In order to cope with this difficulty we propose in this work the partial asymptotic stabilization. For a given motion of a dynamical system, say x(t,$x_0,t_0$)=(y(t,$y_0,t_0$),z(t,$z_0,t_0$)), the partial stabilization is the qualitative behavior of the y-component of the motion(i.e., the asymptotic stabilization of the motion with respect to y) and the z-component converges, relative to the initial vector x($t_0$)=$x_0$=($y_0,z_0$). In this work we present new results for the adding integrators for partial asymptotic stabilization. Two applications are given to illustrate our theoretical result. The first problem treated is the partial attitude control of the rigid spacecraft with two controls. The second problem treated is the partial orientation of the underactuated ship.

• Journal of Power Electronics
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• v.18 no.4
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• pp.1037-1050
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• 2018

This paper presents a novel reconfigurable selective harmonic elimination technique to control harmonics over a wide range of Modulation Indexes (MI) in Multi-Level Inverter (MLI). In the proposed method, the region of the MI is divided into various sectors and expressions are formulated with different switching patterns for each of the sectors. A memetic BBO-MAS (Biogeography Based Optimization - Mesh Adaptive direct Search) optimization algorithm is proposed for solving the Selective Harmonic Elimination - Pulse Width Modulation (SHE-PWM) technique. An experimental prototype is developed using a Field Programmable Gate Array (FPGA) and their FFT spectrums are analyzed over a wide range of MI using a fluke power logger. Simulation and experimental results have validated the performance of the proposed optimization algorithms and the reconfigurable SHE-PWM technique. Further, the sensitivity of the harmonics has been analyzed considering non-integer variations in the magnitude of the input DC sources.

• Proceedings of the KIPE Conference
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• 2012.11a
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• pp.93-94
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• 2012

본 논문에서는 효율 향상과 부피저감을 위한 전기자동차용 3.7kW급 비절연형 탑재형 충전기를 소개하고, 강압영역에서의 성능 개선을 위한 알고리즘을 제안한다. 제안한 충전기 토폴로지는 Cascaded Buck-Boost 컨버터로 두개의 Pole로 구성되어 있으며, 강압영역에서 제어는 기존의 제어 방식과 다르게 두 개의 Pole을 동시에 제어하지 않고 각각을 제어하여 인덕터의 전류 리플을 저감하여 충전효율을 증가 시킬 수 있다. 제안한 시스템 및 알고리즘은 실험을 통해 검증한다.

• Journal of international Conference on Electrical Machines and Systems
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• v.1 no.1
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• pp.77-83
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• 2012

In this paper, an optimal solution to the harmonic reduction problem in a cascaded multilevel inverter with non-equal DC sources using a genetic algorithm (GA) is presented. Switching angles are generated for different values of modulation index by the proposed algorithm, considering minimum voltage total harmonic distortion (THD) whereas selected harmonics are controlled within the allowable limits at all desired modulation indices including the point of discontinuity. Results are stored as a look-up table to be used to control the inverter for a certain operating point. The computed angles are used in a simulated circuit in Matlab\Simulink to validate the results.

• The Transactions of the Korean Institute of Electrical Engineers D
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• v.53 no.2
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• pp.111-117
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• 2004

The low-power design of the A/D converter is indispensable to achieve the compact bio-signal measuring device with long battery duration. In this paper, new decimation filter structure is proposed for the low-power design of the Sigma-Delta A/D converter in the bio-instruments. The proposed filter is based on the non-recursive structure of the CIC (Cascaded Integrator Comb) decimation filter in the Sigma-Delta A/D converter. By combining the CSD (Canonic Signed Digit) structure with common sub-expression sharing technique, the proposed decimation filter structure can significantly reduce the number of adders for implementation. For the fixed decimation factor of 16, the 15％ of power consumption saving is achieved in the proposed structure in comparison with that of the conventional polyphase CIC filter.

• Current Optics and Photonics
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• v.1 no.6
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• pp.579-586
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• 2017

In this paper, we theoretically demonstrate that semiconductor optical amplifiers (SOAs) with strong wavelength dependence of gain and phase are capable of all-optical inverted and non-inverted wavelength conversion (WC) over a wide range, with the assistance of an optical filter. First, the gain dynamics and phase dynamics in a common quantum well (QW) SOA with the $In_{0.53}Ga_{0.47}As/In_{0.7322}Ga_{0.2678}As_{0.5810}P_{0.4190}$ material system are found to be strongly dependent on wavelength, which is mainly related to the wavelength dependence of the differential gain and the differential refractive-index change. Second, the wavelength dependence in an all-optical wavelength converter based on the QW SOA cascaded with a detuning band pass filter is studied. Simulations show that the quality of the converted signal has little dependence on the operation wavelength. Both inverted and non-inverted WC can be achieved, over a large wavelength range. Therefore, although the gain and phase change are strongly wavelength-dependent, the effects of this dependence can be erased by appropriate optical filtering.

• Journal of Power Electronics
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• v.13 no.4
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• pp.569-583
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• 2013

In this study, the simultaneous use of a multi-level converter (MLC) as a DC-motor drive and as an active battery cell balancer is investigated. MLCs allow each battery cell in a battery pack to be independently switched on and off, thereby enabling the potential non-uniform use of battery cells. By exploiting this property and the brake regeneration phases in the drive cycle, MLCs can balance both the state of charge (SoC) and temperature differences between cells, which are two known causes of battery wear, even without reciprocating the coolant flow inside the pack. The optimal control policy (OP) that considers both battery pack temperature and SoC dynamics is studied in detail based on the assumption that information on the state of each cell, the schedule of reciprocating air flow and the future driving profile are perfectly known. Results show that OP provides significant reductions in temperature and in SoC deviations compared with the uniform use of all cells even with uni-directional coolant flow. Thus, reciprocating coolant flow is a redundant function for a MLC-based cell balancer. A specific contribution of this paper is the derivation of a state-space electro-thermal model of a battery submodule for both uni-directional and reciprocating coolant flows under the switching action of MLC, resulting in OP being derived by the solution of a convex optimization problem.