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A 1V 10b 30MS/s CMOS ADC Using a Switched-RC Technique  

Ahn, Gil-Cho (Dept. of Electronic Engineering, Sogang University))
Publication Information
Journal of the Institute of Electronics Engineers of Korea SD / v.46, no.8, 2009 , pp. 61-70 More about this Journal
Abstract
A 10b 30MS/s pipelined ADC operating under 1V power supply is presented. It utilizes a switched-RC based input sampling circuit and a resistive loop to reset the feedback capacitor in the multiplying digital-to-analog converter (MDAC) for the low-voltage operation. Cascaded switched-RC branches are used to achieve accurate grain of the MDAC for the first stage and separate switched-RC circuits are used in the sub-ADC to suppress the switching noise coupling to the MDAC input The measured differential and integral non-linearities of the prototype ADC fabricated in a 0.13${\mu}m$, CMOS process are less than 0.54LSB and 1.75LSB, respectively. The prototype ADC achieves 54.1dB SNDR and 70.4dB SFDR with 1V supply and 30MHz sampling frequency while consuming 17mW power.
Keywords
ADC; CMOS;
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