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http://dx.doi.org/10.6113/JPE.2018.18.4.1037

Reconfigurable Selective Harmonic Elimination Technique for Wide Range Operations in Asymmetric Cascaded Multilevel Inverter  

Kavitha, R (Dept. of Electrical and Electronics Engineering, Kumaraguru College of Technology)
Rani, Thottungal (Dept. of Electrical and Electronics Engineering, Kumaraguru College of Technology)
Publication Information
Journal of Power Electronics / v.18, no.4, 2018 , pp. 1037-1050 More about this Journal
Abstract
This paper presents a novel reconfigurable selective harmonic elimination technique to control harmonics over a wide range of Modulation Indexes (MI) in Multi-Level Inverter (MLI). In the proposed method, the region of the MI is divided into various sectors and expressions are formulated with different switching patterns for each of the sectors. A memetic BBO-MAS (Biogeography Based Optimization - Mesh Adaptive direct Search) optimization algorithm is proposed for solving the Selective Harmonic Elimination - Pulse Width Modulation (SHE-PWM) technique. An experimental prototype is developed using a Field Programmable Gate Array (FPGA) and their FFT spectrums are analyzed over a wide range of MI using a fluke power logger. Simulation and experimental results have validated the performance of the proposed optimization algorithms and the reconfigurable SHE-PWM technique. Further, the sensitivity of the harmonics has been analyzed considering non-integer variations in the magnitude of the input DC sources.
Keywords
Modulation index; Multilevel inverter; SHE-PWM technique; THD;
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1 M. Etesami, N. Ghasemi, D. M. Vilathgamuwa, and W. L. Malan, "Particle swarm optimisation-based modified SHE method for cascaded H-bridge multilevel inverters," IET Power Electron., Vol. 10, No. 1, pp. 18-28, Jan. 2017.   DOI
2 A. Moeini, H. Iman-Eini, and A. Marzoughi, "DC link voltage balancing approach for cascaded H-bridge active rectifier based on selective harmonic elimination-pulse width modulation," IET Power Electron., Vol. 8, No. 4, pp. 583-590, Feb. 2015.   DOI
3 N. Farokhnia, S. H. Fathi, R. Salehi, G. B. Gharehpetian, and M. Ehsani, "Improved selective harmonic elimination PWM Strategy in multilevel inverters," IET Power Electron., Vol. 5, No. 9, pp. 1904-1911, Nov. 2012.   DOI
4 W. A. Halim, N. A. Rahim, and M. Azri, "Selective Harmonic Elimination for a single phase 13-level TCHB based cascaded multilevel inverter using FPGA," J. Power Electron., Vol. 14, No. 3, pp. 488-498, May. 2014.   DOI
5 D. Simon, "Biogeography-based optimization," IEEE Trans. Evol. Comput., Vol. 12, No. 6, pp. 702-713, Dec. 2008.   DOI
6 M. R. Banaei and P. A. Shayan, "Solution for selective harmonic optimization in diode-clamped inverters using radial basis function neural networks," IET Power Electron., Vol. 7, No. 7, pp. 1797-1804, Mar. 2014.   DOI
7 Y. S. Kumar and G. Poddar, "Control of medium-voltage AC motor drive for wide speed range using modular multilevel converter," IEEE Trans. Ind. Electron., Vol. 64, No. 4, pp. 2742-2749, Apr. 2017.   DOI
8 J. Cao, H. Liu, P. Ding, B. Yang, and S. Xie, "Wide correction range three-level dynamic voltage corrector," IEEE Trans. Power Electron., Vol. 31, No. 9, pp. 6217- 6225, Sep. 2016.   DOI
9 J. N. Chiasson, L. M. Tolbert, K. J. McKenzie, and Z. Du, "Elimination of harmonics in a multilevel converter using the theory of symmetric polynomials and resultants," IEEE Trans. Contr. Syst. Technol., Vol. 13, No. 2, pp. 216-223, Mar. 2005.   DOI
10 K. Yang, Q. Zhang, R. Yuan, W. Yu, and J. Wang, "Selective harmonic elimination with Groebner bases and symmetric polynomials," IEEE Trans. Power Electron., Vol. 31, No. 4, pp. 689-694, Apr. 2015.
11 R. N. Ray, D. Chatterjee, and S. K. Goswami, "An application of PSO technique for harmonic elimination in a PWM inverter," Applied Soft Computing, Vol. 9, No. 4, pp. 1315-1320, Sep. 2009.   DOI
12 V. Roberge, M. Tarbouchi, and F. Okou, "Strategies to accelerate harmonic minimization in multilevel inverters using a parallel genetic algorithm on graphical processing unit," IEEE Trans. Power Electron., Vol. 29, No. 10, pp. 5087-5090, Oct. 2014.   DOI
13 M. T. Hagh, H. Taghizadeh and K. Razi, "Harmonic minimization in multilevel inverters using modified species-based particle swarm optimization," IEEE Trans. Power Electron., Vol. 24, No. 10, pp. 2259-2267, Oct. 2009.   DOI
14 Z. Salam, A. M. Amjad, and A. Majed, "Design and implementation of 15-level cascaded multi-level voltage source inverter with harmonics elimination pulse-width modulation using differential evolution method," IET Power Electron., Vol. 8, No. 9, pp. 1740-1748, Jun. 2015.   DOI
15 M. S. A. Dahidah, G. Konstantinou, and V. G. Agelidis, "A review of multilevel selective harmonic elimination PWM: Formulations, solving algorithms, implementation and applications," IEEE Trans. Power Electron., Vol. 30, No. 8, pp. 4091-4106, Aug. 2015.   DOI
16 K. Shen, D. Zhao, J. Mei, L. M. Tolbert, J. Wang, M. Ban, Y. Ji, and X. Cai. "Elimination of harmonics in a modular multilevel converter using particle swarm optimization-based staircase modulation strategy," IEEE Trans. Ind. Electron., Vol. 61, No. 10, pp. 5311-5322, Oct. 2014.   DOI
17 J. Rodriguez, J. S. Lai, and Z. P. Fang, "Multilevel inverters: A survey of topologies, controls and applications," IEEE Trans. Ind. Electron., Vol. 49, No. 4, pp. 724-738, Aug. 2002.   DOI
18 L. G. Franquelo, J. Rodriguez, J. I. Leon, S. Kouro, and R. Portillo, "The Age of multilevel converters arrives," IEEE Ind. Electron. Mag , Vol. 2, No. 2, pp. 28-39, Jun. 2008.   DOI
19 A. Mahrous and E. Hendawi, "A new single-phase asymmetrical cascaded multilevel DC-link inverter," J. Power Electron., Vol. 1 No.4, pp 1504-1512, Jul. 2016.
20 B. Ozpineci, L. M. Tolbert, and J. N. Chiasson, "Harmonic optimization of multilevel converters using genetic algorithms," IEEE Power Electron. Lett., Vol. 3, No. 3, pp. 92-95, Sep. 2005.   DOI
21 A. Moeini, H. Iman-Eini, and M. Najjar, "Non-equal DC link voltages in a cascaded H-bridge with a selectiveharmonic mitigation-PWM technique based on the fundamental switching frequency," J. Power Electron., Vol. 17, No. 1, pp. 106-114, Jan. 2017.   DOI
22 Y. Ahn, J. Park, C. G. Lee, J. Kim, and S. Jung, "Novel memetic algorithm implemented with GA and MADS for optimal design of electromagnetic system," IEEE Trans. of Magn., Vol. 46, No. 6, pp. 1982-1985, Jun. 2010.   DOI
23 A. K. Bansal, R. Kumar, and R. A. Gupta, "Economic analysis and power managment of a small autonomous hybrid power system (SAHPS) using biogeography based optimization (BBO) algorithm," IEEE Trans. Smart Grid, Vol. 4, No. 1, pp. 638-648, Mar. 2013.   DOI
24 S. H. Yang and J. F. Kiang, "Optimization of asymmetrical difference pattern with memetic algorithm," IEEE Trans. Antennas Propag., Vol. 62, No. 4, pp. 2297-2302, Apr. 2014.   DOI
25 Y. Ahn, J. Park, C. G. Lee, J. Kim, and S. Y. Jung, "Novel memetic algorithm implemented with GA and MADS for optimal design of electromagnetic system," IEEE Trans. of Magn., Vol. 46, No. 6, pp. 1982-1985, Jun. 2010.   DOI
26 H. R. Baghaee, M. Mirsalim, G. B. Gharehpetian, H. A. Talebi, and A. Niknam-Kumle, "A hybrid ANFIS/ ABC-based online selective harmonic elimination switching pattern for cascaded multi-level inverters of microgrids," IEEE Trans. Ind. Electron., to be published.
27 A. M. Amjad, Z. Salam, and A. M. A. Saif, "Application of differential evolution for cascaded multilevel VSI with harmonics elimination PWM switching," International Journal of Electrical Power and Energy Systems, Vol. 64, pp. 447-456, Jan. 2015.   DOI
28 V. G. Agelidis, A. I. Balouktsis, and M. S. Dahidah, "A five-level symmetrically defined selective harmonic elimination PWM strategy: Analysis and experimental validation," IEEE Trans. Power Electron., Vol. 23, No. 1, pp. 19-26, Jan. 2008.   DOI
29 H. R. Massrur, T. Niknam, and M. Mardaneh, "Harmonic elimination in multilevel inverters under unbalanced voltages and switching deviation using a new stochastic strategy," IEEE Trans. Ind. Informat., Vol. 12, No. 2, pp.716-725, Apr. 2016.   DOI
30 M. H. Etesami, N. Farokhnia, and S. Hamid Fathi, "Colonial competitive algorithm development toward harmonic minimization in multilevel inverters," IEEE Trans. Ind. Informat., Vol. 11, No. 2, pp. 459-466, Apr. 2015.   DOI
31 P. L. Kamani and M. A Mulla, "Middle-level SHE pulseamplitude modulation for cascaded multilevel inverters," IEEE Trans. Ind. Electron., Vol. 65, No. 3, pp. 2828-2833, Mar. 2018.   DOI