• 전자공학회논문지
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• 제52권8호
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• pp.59-63
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• 2015

본 연구에서는 MONOS 플래시 메모리의 blocking oxide/trapping nitride, trapping nitride/tunneling oxide 계면 트랩을 구하기 위해 C-V 방법을 도입하였고, stoichiometric 조건을 만족하는 nitride와 silicon rich nitride를 trapping layer로 갖는 MONOS capacitor를 제작하여 각각의 interface trap 특성을 비교분석하였다. 보고에 따르면 silicon rich nitride는 stoichiometric nitride에 비해 다수의 shallow trap이 존재한다고 보고되고 있는데, 본 연구를 통해 이의 정량화가 가능함을 보였다.

• Transactions on Electrical and Electronic Materials
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• 제5권6호
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• pp.227-232
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• 2004

We investigated a nonvolatile nanomemory element based on boron nitride nanopeapods using molecular dynamics simulations. The studied system was composed of two boron-nitride nanotubes filled Cu electrodes and fully ionized endo-fullerenes. The two boron-nitride nanotubes were placed face to face and the endo-fullerenes came and went between the two boron-nitride nanotubes under alternatively applied force fields. Since the endo-fullerenes encapsulated in the boron-nitride nanotubes hardly escape from the boron-nitride nanotubes, the studied system can be considered to be a nonvolatile memory device. The minimum potential energies of the memory element were found near the fullerenes attached copper electrodes and the activation energy barrier was $3{\cdot}579 eV$. Several switching processes were investigated for external force fields using molecular dynamics simulations. The bit flips were achieved from the external force field of above $3.579 eV/{\AA}$.

• 반도체디스플레이기술학회지
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• 제18권4호
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• pp.134-137
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• 2019

In this paper, the data retention characteristics were analyzed to find out the thickness effect on the trap energy distribution of silicon nitride in the silicon-oxide-nitride-oxide-silicon (SONOS) flash memory devices. The nitride films were prepared by low pressure chemical vapor deposition (LPCVD). The flat band voltage shift in the programmed device was measured at the elevated temperatures to observe the thermal excitation of electrons from the nitride traps in the retention mode. The trap energy distribution was extracted using the charge decay rates and the experimental results show that the portion of the shallow interface trap in the total nitride trap amount including interface and bulk trap increases as the nitride thickness decreases.

• 전기전자학회논문지
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• 제25권4호
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• pp.770-773
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• 2021

본 논문에서는 tapering과 ferroelectric(HfO₂)구조가 적용된 3D NAND flash memory의 프로그램 이후 시간경과에 따른 retention특징을 분석했다. Nitride에 trap된 전자는 시간이 지남에 따라 lateral charge migration이 발생한다. 프로그램 이후 시간이 지남에 따라 trap된 전자가 tapering에 의해 두꺼워진 채널 쪽으로 lateral charge migration이 더 많이 발생하는 것을 확인했다. 또한 Oxide-Nitride-Ferroelectric (ONF) 구조는 polarization에 의해 lateral charge migration이 완화되기 때문에 기존 Oxide-Nitride-Oxide (ONO) 구조 보다 문턱전압(V_th)의 변화량이 줄어든다.

• JSTS:Journal of Semiconductor Technology and Science
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• 제5권1호
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• pp.24-29
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• 2005

Silicon nitride cantilevers integrated with silicon heaters and piezoelectric sensors were developed for the scanning probe microscope (SPM) based data storage application. These nitride cantilevers are expected to have better mechanical stability and uniformity of initial bending than the previously developed silicon cantilevers. Data bits of 40 nm in diameter were recorded on PMMA film and the sensitivity of the piezoelectric sensor was 0.615 fC/nm, meaning that indentations less than 20 nm in depth can be detected. For high speed operation, $128{\times}128$ cantilever array was developed.

• 한국전기전자재료학회논문지
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• 제25권2호
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• pp.85-90
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• 2012

In this paper, we compared and analyzed 3D silicon-oxide-nitride-oxide-silicon (SONOS) multi layer flash memory devices fabricated on nitride or oxide layer, respectively. The device fabricated on nitride layer has inferior electrical properties than that fabricated on oxide layer. However, the device on nitride layer has faster program / erase speed (P/E speed) than that on the oxide layer, although having inferior electrical performance. Afterwards, to find out the reason why the device on nitride has faster P/E speed, 1/f noise analysis of both devices is investigated. From gate bias dependance, both devices follow the mobility fluctuation model which results from the lattice scattering and defects in the channel layer. In addition, the device on nitride with better memory characteristics has higher normalized drain current noise power spectral density ($S_{ID}/I^2_D$>), which means that it has more traps and defects in the channel layer. The apparent hooge's noise parameter (${\alpha}_{app}$) to represent the grain boundary trap density and the height of grain boundary potential barrier is considered. The device on nitride has higher ${\alpha}_{app}$ values, which can be explained due to more grain boundary traps. Therefore, the reason why the devices on nitride and oxide have a different P/E speed can be explained due to the trapping/de-trapping of free carriers into more grain boundary trap sites in channel layer.

• 정보저장시스템학회논문집
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• 제1권1호
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• pp.73-77
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• 2005

In this paper, a new silicon nitride cantilever integrated with silicon heater and piezoelectric sensor has been firstly developed to improve the uniformity of the initial bending and the mechanical stability of the cantilever array for thermo-piezoelectric SPM(scanning probe microscopy) -based data storages. This nitride cantilever shows thickness uniformity less than $2\%$. Data bits of 40 nm in diameter were recorded on PMMA film. The sensitivity of the piezoelectric sensor was 0.615 fC/nm after poling the PZT layer. For high speed operation, 128${\times}$128 probe array was developed.

• 전자공학회논문지A
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• 제29A권8호
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• pp.56-62
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• 1992

This paper is analyzed the charge trapping and electrical properties of 0(Oxide), NO(Nitrided oxide) and ONO(Reoxidized nitrided oxide) as dielectric films in MIS structures. We have processed bottom oxide and top oxide by the thermal method, and nitride(Si$_{3}N_{4}$) by the LPCVD(Low Pressure Chemical Vapor Deposition) method on P-type(100) Silicon wafer. We have studied the charge trapping properties of the dielectrics by using a computer controlled DLTS system. All of the dielectric films are shown peak nearly at 300K. Those are bulk traps. Many trap densities which is detected in NO films, but traps. Many trap densities which is detected in NO films. Varing the nitride thickness, the trap densities of thinner nitride is decreased than the thicker nitride. Finally we have found that trap densities of ONO films is affected by nitride thickness.

• Journal of Power Electronics
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• 제9권1호
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• pp.36-42
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• 2009

This paper presents a review of an improved high power-high frequency III-V wide bandgap (WBG) semiconductor device, Gallium Nitride (GaN). The device offers better efficiency and thermal management with higher switching frequency. By having higher blocking voltage, GaN can be used for high voltage applications. In addition, the weight and size of passive components on the printed circuit board can be reduced substantially when operating at high frequency. With proper management of thermal and gate drive design, the GaN power converter is expected to generate higher power density with lower stress compared to its counterparts, Silicon (Si) devices. The main contribution of this work is to provide additional information to young researchers in exploring new approaches based on the device's capability and characteristics in applications using the GaN power converter design.

• 한국진공학회:학술대회논문집
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• 한국진공학회 2012년도 제42회 동계 정기 학술대회 초록집
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• pp.192-192
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• 2012

The next generation electronics need to not only be smaller but also be more flexible. To meet such demands, electronic devices using two dimensional (2D) atomic crystals like graphene, hexagonal boron nitride (h-BN), molybdenum disulfate ($MoS_2$) and organic thin film have been studied intensely. In this talk, I will demonstrate the $MoS_2$ field effect transistor (FET) toward performance enhancement by insulating h-BN substrate.