• 전자공학회논문지
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• 제49권10호
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• pp.11-17
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• 2012

가시광 무선 통신 (Visible Light Communication; VLC) 시스템은 조명 장치와 무선 통신의 역할을 동시에 수행하는 특징을 가진다. 하지만 조명 장치로서의 전력 소비와 통신 시스템으로서의 통신 채널 품질이 서로 상충관계에 있어서 가시광 무선 통신 시스템 설계에 문제가 발생한다. 이에 본 논문에서는 다목적 최적화 기법을 이용하여 전력 소비 최소화와 통신 채널 품질 최대화를 위한 최적화 연구를 수행하였다. 이를 위해 전력 소비와 수신 세기 그리고 SNR에 대한 목적함수 설정과 전력 소비 및 통신 채널 품질에 영향을 줄 수 있는 변수들을 범위 구간을 설정한 제약 조건을 제시하였다. 그 결과 전력 소비 최소화와 통신 채널 품질 최대화를 동시에 만족시킬 수 있는 최적화 해를 산출할 수 있었다.

• 대한전자공학회논문지SD
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• 제44권7호통권361호
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• pp.81-89
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• 2007

비터비 복호기는 디지털 통신 시스템에서 순방향 오류 정정을 위해서 사용하는 핵심적인 부분으로 최우 추정 복호 방식의 알고리즘을 사용한다. 비터비 복호기는 복호기 상태의 개수만큼의 경로를 계산하고 역 추적하는 특성 때문에 저 전력화가 상당히 어렵다. 본 논문에서는 기존의 SPEC-T 알고리즘을 구현하는데 있어서 비교기의 동작을 최소화할 수 있는 효율적인 방법을 제안하고 ACS(Add-Compare-Select) 구조와 MPMS(Minimum Path Metric Search) 구조에 이를 적용하였다. 실험 결과, 제안한 ACS 구조와 MPMS 구조는 기존의 구조보다 전력 소모량이 임계 값 26에서 각각 최대 약 10.7%와 11.5% 감소하였고 SPEC-T 구조보다는 전력 소모량이 임계 값 26에서 각각 약 6%와 1.5% 더 감소하였다.

• Journal of Information Processing Systems
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• 제13권3호
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• pp.500-517
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• 2017

In this paper, an improved zone-based routing protocol for heterogeneous wireless sensor networks is proposed. The proposed protocol has fixed the sized zone according to the distance from the base station and used a dynamic clustering technique for advanced nodes to select a cluster head with maximum residual energy to transmit the data. In addition, we select an optimal route with minimum energy consumption for normal nodes and conserve energy by state transition throughout data transmission. Simulation results indicated that the proposed protocol performed better than the other algorithm by reducing energy consumption and providing a longer network lifetime and better throughput of data packets.

• ETRI Journal
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• 제39권1호
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• pp.30-40
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• 2017

In this study, we investigate topology control as a means of obtaining the best possible compromise between the conflicting requirements of reducing energy consumption and improving network connectivity. A topology design algorithm capable of producing network topologies that minimize energy consumption under a minimum-connectivity constraint is presented. To this end, we define a new topology metric, called connectivity efficiency, which is a function of both algebraic connectivity and the transmit power level. Based on this metric, links that require a high transmit power but only contribute to a small fraction of the network connectivity are chosen to be removed. A connectivity-efficiency-based topology control (CETC) algorithm then assigns a transmit power level to each node. The network topology derived by the proposed CETC heuristic algorithm is shown to attain a better tradeoff between energy consumption and network connectivity than existing algorithms. Simulation results demonstrate the efficiency of the CECT algorithm.

• Journal of Electrical Engineering and Technology
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• 제7권6호
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• pp.852-858
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• 2012

This paper describes evaluation results of the wind power penetration limit (WPPL) and the wind energy penetration (WEP) in the Mongolian central power system (MCPS). A wind power plant (WPP) in a power system possesses an output power limit because the power system must maintain a balance between the generation and consumption of electricity at all times in order to achieve an adequate level of quality. The instantaneous penetration limit (IPL) of wind generation at a load is determined as the minimum of the three technical constraints: the minimum output, the ramp rate capability, and the spinning reserve of the conventional generating units. In this paper, a WPPL is defined as the maximum IPL divided by the peak load. A maximal variation rate (VR) of wind power is a major factor in determining the IPL, WPPL, and WEP. This paper analyzes the effects of the maximal VR of wind power on the WPPL, WEP, and capacity factor (CF) in the MCPS. The results indicate that a small VR can facilitate a large amount of wind energy while maintaining a high CF with increased wind power penetration.

• 대한전자공학회:학술대회논문집
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• 대한전자공학회 2000년도 추계종합학술대회 논문집(2)
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• pp.337-340
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• 2000

In this paper, we put forth a procedure that target low power logic synthesis based on XOR representation of Boolean functions, and the results of synthesis procedure are a multi-level XOR form with minimum switching activity. Specialty, this paper show a method to extract the common cubes or kernels by Boolean matrix and rectangle covering, and to estimate the power consumption in terms of the extracted common sub-functions.

• 대한의용생체공학회:학술대회논문집
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• 대한의용생체공학회 1992년도 춘계학술대회
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• pp.193-197
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• 1992

• 대한전자공학회:학술대회논문집
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• 대한전자공학회 2001년도 하계종합학술대회 논문집(2)
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• pp.121-124
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• 2001

This paper proposed resource allocation algorithm for the minimum switching activity of functional unit in high level synthesis process as like DSP which is circuit to give many functional unit. The resource allocation method after scheduling use the power function calculating average hamming distance and switching activity of the between two input. First of all, the switching activity is calculated by the input value after calculating the average hamming distance between operation. In this paper, the proposed method though high If level simulation find switching activity in circuit each functional unit exchange for binary sequence length and value bit are logic one value. To use the switching activity find the allocation with minimal power consumption, the proposed method visits all control steps one by one and determines the allocation with minimal power consumption at each control step. As the existing method, the execution time can be fast according to use the number of operator and max control step. And it is the reduction effect from 6% to 8%.

• ETRI Journal
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• 제43권4호
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• pp.717-727
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• 2021

In this study, new multiplier and adder method designs with multiplexers are proposed. The designs are based on quaternary logic and a carbon nanotube field-effect transistor (CNTFET). The design utilizes 4 × 4 multiplier blocks. Applying specific rotational functions and unary operators to the quaternary logic reduced the power delay produced (PDP) circuit by 54% and 17.5% in the CNTFETs used in the adder block and by 98.4% and 43.62% in the transistors in the multiplier block, respectively. The proposed 4 × 4 multiplier also reduced the occupied area by 66.05% and increased the speed circuit by 55.59%. The proposed designs are simulated using HSPICE software and 32 nm technology in the Stanford Compact SPICE model for CNTFETs. The simulated results display a significant improvement in the fabrication, average power consumption, speed, and PDP compared to the current bestperforming techniques in the literature. The proposed operators and circuits are evaluated under various operating conditions, and the results demonstrate the stability of the proposed circuits.

• 동력기계공학회지
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• 제13권6호
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• pp.43-50
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• 2009

If an internal combustion engine is operated by consolidated control, the minimum fuel consumption is achieved satisfying the demanded objectives. For this, it is necessary that the engine is operated on the ideal operating line which satisfies minimum fuel consumption. In this context of view, there are many tries to achieve given object. However, the parameter in the internal combustion engines are variable and depend on the operating points. Therefore, it is necessary to cope with the uncertainties such that the optimal operating may be possible. From this point of view, this paper gives a controller design method and a robust stability condition for engine torque control which satisfies the given control performance and robust stability in the presence of physical parameter perturbation. Exactly, the present paper considers a robust stability of this 2DOF servosystem with nonlinear type uncertainty in the engine system, and a robust stability condition for the servosystem is introduced. This result guarantees that if the plant uncertainty is in the permissible set defined by the given condition then a gain tuning can be carried out to suppress the influence of the plant uncertainties.