• Title/Summary/Keyword: matching circuit

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Design and Fabrication of an LPVT Embedded in a GIS Spacer (GIS 스페이서 내장형 저전력 측정용 변압기의 설계 및 제작)

  • Seung-Gwan Park;Gyeong-Yeol Lee;Nam-Hoon Kim;Cheol-Hwan Kim;Gyung-Suk Kil
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.37 no.2
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    • pp.175-181
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    • 2024
  • In electrical power substations, bulky iron-core potential transformers (PTs) are installed in a tank of gas-insulated switchgear (GIS) to measure system voltages. This paper proposed a low-power voltage transformer (LPVT) that can replace the conventional iron-core PTs in response to the demand for the digitalization of substations. The prototype LPVT consists of a capacitive voltage divider (CVD) which is embedded in a spacer and an impedance matching circuit using passive components. The CVD was fabricated with a flexible PCB to acquire enough insulation performance and withstand vibration and shock during operation. The performance of the LPVT was evaluated at 80%, 100%, and 120% of the rated voltage (38.1 kV) according to IEC 61869-11. An accuracy correction algorithm based on LabVIEW was applied to correct the voltage ratio and phase error. The corrected voltage ratio and phase error were +0.134% and +0.079 min., respectively, which satisfies the accuracy CL 0.2. In addition, the voltage ratio of LPVT was analyzed in ranges of -40~+40℃, and a temperature correction coefficient was applied to maintain the accuracy CL 0.2. By applying the LPVT proposed in this paper to the same rating GIS, it can be reduced the length per GIS bay by 11%, and the amount of SF6 by 5~7%.

A Compact 370 W High Efficiency GaN HEMT Power Amplifier with Internal Harmonic Manipulation Circuits (내부 고조파 조정 회로로 구성되는 고효율 370 W GaN HEMT 소형 전력 증폭기)

  • Choi, Myung-Seok;Yoon, Tae-San;Kang, Bu-Gi;Cho, Samuel
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.24 no.11
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    • pp.1064-1073
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    • 2013
  • In this paper, a compact 370 W high efficiency GaN(Gallium Nitride) HEMT(High Electron Mobility Transistor) power amplifier(PA) using internal harmonic manipulation circuits is presented for cellular and L-band. We employed a new circuit topology for simultaneous high efficiency matching at both fundamental and 2nd harmonic frequency. In order to minimize package size, new 41.8 mm GaN HEMT and two MOS(Metal Oxide Semiconductor) capacitors are internally matched and combined package size $10.16{\times}10.16{\times}1.5Tmm^3$ through package material changes and wire bonded in a new package to improve thermal resistance. When drain biased at 48 V, the developed GaN HEMT power amplifier has achieved over 80 % Drain Efficiency(DE) from 770~870 MHz and 75 % DE at 1,805~1,880 MHz with 370 W peak output power(Psat.). This is the state-of-the-art efficiency and output power of GaN HEMT power amplifier at cellular and L-band to the best of our knowledge.

Highly Linear Wideband LNA Design Using Inductive Shunt Feedback (Inductive Shunt 피드백을 이용한 고선형성 광대역 저잡음 증폭기)

  • Jeonng, Nam Hwi;Cho, Choon Sik
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.24 no.11
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    • pp.1055-1063
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    • 2013
  • Low noise amplifiers(LNAs) are an integral component of RF receivers and are frequently required to operate at wide frequency bands for various wireless systems. For wideband operation, important performance metrics such as voltage gain, return loss, noise figures and linearity have been carefully investigated and characterized for the proposed LNA. An inductive shunt feedback configuration is successfully employed in the input stage of the proposed LNA which incorporates cascaded networks with a peaking inductor in the buffer stage. Design equations for obtaining low and high input matching frequencies are easily derived, leading to a relatively simple method for circuit implementation. Careful theoretical analysis explains that poles and zeros are characterized and utilized for realizing the wideband response. Linearity is significantly improved because the inductor between gate and drain decreases the third-order harmonics at the output. Fabricated in $0.18{\mu}m$ CMOS process, the chip area of this LNA is $0.202mm^2$, including pads. Measurement results illustrate that input return loss shows less than -7 dB, voltage gain greater than 8 dB, and a little high noise figure around 7~8 dB over 1.5~13 GHz. In addition, good linearity(IIP3) of 2.5 dBm is achieved at 8 GHz and 14 mA of current is consumed from a 1.8 V supply.

Fabrication and Electrical Insulation Property of Thick Film Glass Ceramic Layers on Aluminum Plate for Insulated Metal Substrate (알루미늄 판상에 글라스 세라믹 후막이 코팅된 절연금속기판의 제조 및 절연특성)

  • Lee, Seong Hwan;Kim, Hyo Tae
    • Journal of the Microelectronics and Packaging Society
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    • v.24 no.4
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    • pp.39-46
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    • 2017
  • This paper presents the fabrication of ceramic insulation layer on metallic heat spreading substrate, i.e. an insulated metal substrate, for planar type heater. Aluminum alloy substrate is preferred as a heat spreading panel due to its high thermal conductivity, machinability and the light weight for the planar type heater which is used at the thermal treatment process of semiconductor device and display component manufacturing. An insulating layer made of ceramic dielectric film that is stable at high temperature has to be coated on the metallic substrate to form a heating element circuit. Two technical issues are raised at the forming of ceramic insulation layer on the metallic substrate; one is delamination and crack between metal and ceramic interface due to their large differences in thermal expansion coefficient, and the other is electrical breakdown due to intrinsic weakness in dielectric or structural defects. In this work, to overcome those problem, selected metal oxide buffer layers were introduced between metal and ceramic layer for mechanical matching, enhancing the adhesion strength, and multi-coating method was applied to improve the film quality and the dielectric breakdown property.

Millimeter-wave LTCC Front-end Module for Highly Integrated Transceiver (고집적 송수신기를 위한 밀리미터파 LTCC Front-end 모듈)

  • Kim, Bong-Su;Byun, Woo-Jin;Kim, Kwang-Seon;Eun, Ki-Chan;Song, Myung-Sun
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.17 no.10 s.113
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    • pp.967-975
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    • 2006
  • In this paper, design and implementation of a very compact and cost effective front-end module are presented for IEEE 802.16 FWA(fixed Wireless Access) in the 40 GHz band. A multi-layer LTCC(Low Temperature Co-fred Ceramic) technology with cavity process to achieve excellent electrical performances is used to fabricate the front-end module. The wirebond matching circuit design of switch input/output port and waveguide transition to connect antenna are optimally designed to keep transmission loss low. To reduce the size of the front-end module, the dielectric waveguide filter is developed instead of the metal waveguide filter. The LTCC is composed of 6 layers(with the thickness of a layer of 100 um) having a relative dielectric constant of 7.1. The front-end module is implemented in a volume of $30{\times}7{\times}0.8mm^3$ and shows an overall insertion loss < 5.3 dB, and image rejection value > 49 dB.

Study on a broadband quasi-Yagi antenna for mobile base station (이동통신 기지국용 광대역 quasi-Yagi 안테나에 관한 연구)

  • Lee, Jong-Ig;Yeo, Jun-Ho
    • Journal of the Korea Academia-Industrial cooperation Society
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    • v.13 no.9
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    • pp.4165-4170
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    • 2012
  • In this paper, a method for the improvement in the gain and bandwidth of a microstrip-fed broadband planar quasi-Yagi antenna (QYA) is studied. The broadband characteristics of the QYA are achieved from the coplanar strip-fed planar dipole driver and a parasitic director close to the driver. In order to obtain stable gain variation over the required frequency band, a director and a ground reflector are appended to the driver having a nearby parasitic director. The QYA is fed through an integrated balun composed of a microstrip line and a slot line which are terminated in a short circuit. By adjusting the feeding point, a broadband impedance matching is obtained. A QYA with an operating frequency band of 1.75-2.7 GHz and a gain > 4.5 dBi is designed and fabricated on an FR4 substrate with dielectric constant of 4.4 and thickness of 1.6mm. The experimental results show that the fabricated antenna has good performance such as a broad bandwidth of 59.7%(1.55-2.87 GHz), a stable gain between 4.7-6.5 dBi, and a front-to-back ratio > 10 dB. The measured data agree well with the simulation, which validates this study.

Design and Implementation of Digital Electrical Impedance Tomography System (디지털 임피던스 영상 시스템의 설계 및 구현)

  • 오동인;백상민;이재상;우응제
    • Journal of Biomedical Engineering Research
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    • v.25 no.4
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    • pp.269-275
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    • 2004
  • Different biological tissues have different values of electrical resistivity. In EIT (electrical impedance tomography), we try to provide cross-sectional images of a resistivity distribution inside an electrically conducting subject such as the human body mainly for functional imaging. However, it is well known that the image reconstruction problem in EIT is ill-posed and the quality of a reconstructed image highly depends on the measurement error. This requires us to develop a high-performance EIT system. In this paper, we describe the development of a 16-channel digital EIT system including a single constant current source, 16 voltmeters, main controller, and PC. The system was designed and implemented using the FPGA-based digital technology. The current source injects 50KHz sinusoidal current with the THD (total harmonic distortion) of 0.0029% and amplitude stability of 0.022%. The single current source and switching circuit reduce the measurement error associated with imperfect matching of multiple current sources at the expense of a reduced data acquisition time. The digital voltmeter measuring the induced boundary voltage consists of a differential amplifier, ADC, and FPGA (field programmable gate array). The digital phase-sensitive demodulation technique was implemented in the voltmeter to maximize the SNR (signal-to-noise ratio). Experimental results of 16-channel digital voltmeters showed the SNR of 90dB. We used the developed EIT system to reconstruct resistivity images of a saline phantom containing banana objects. Based on the results, we suggest future improvements for a 64-channel muff-frequency EIT system for three-dimensional dynamic imaging of bio-impedance distributions inside the human body.

Input Balun Design Method for CMOS Differential LNA (차동 저 잡음 증폭기의 입력 발룬 설계 최적화 기법)

  • Yoon, Jae-Hyuk
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.28 no.5
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    • pp.366-372
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    • 2017
  • In this paper, the analysis of baluns that are inevitably required to design a differential low noise amplifier, The balun converts a single signal input from the antenna into a differential signal, which serves as an input to the differential amplifier. In addition, it protects the circuit from ESD(Electrostatic Discharge) coming through the antenna and helps with input matching. However, in the case of a passive balun used in general, since the AC signal is transmitted through electromagnetic coupling formed between two metal lines, it not only has loss without gain but also has the greatest influence on the total noise figure of the receiving end. Therefore, the design of a balun in a low-noise amplifier is very important, and it is important to design a balun in consideration of line width, line spacing, winding, radius, and layout symmetry that are necessary. In this paper, the factors to be considered for improving the quality factor of balun are summarized, and the tendency of variation of resistance, inductance, and capacitance of the balun according to design element change is analyzed. Based on the analysis results, it is proved that the design of input balun allows the design of low noise, high gain differential amplifier with gain of 24 dB and noise figure of 2.51 dB.

Design of X-band 40 W Pulse-Driven GaN HEMT Power Amplifier Using Load-Pull Measurement with Pre-matched Fixture (사전-정합 로드-풀 측정을 통한 X-대역 40 W급 펄스 구동 GaN HEMT 전력증폭기 설계)

  • Jeong, Hae-Chang;Oh, Hyun-Seok;Yeom, Kyung-Whan;Jin, Hyeong-Seok;Park, Jong-Sul;Jang, Ho-Ki;Kim, Bo-Kyun
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.22 no.11
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    • pp.1034-1046
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    • 2011
  • In this paper, a design and fabrication of 40 W power amplifier for the X-band using load-pull measurement of GaN HEMT chip are presented. The adopted active device for power amplifier is GaN HEMT chip of TriQuint company, which is recently released. Pre-matched fixtures are designed in test jig, because the impedance range of load-pull tuner is limited at measuring frequency. Essentially required 2-port S-parameters of the fixtures for extraction optimal input and output impedances is obtained by the presented newly method. The method is verified in comparison of the extracted optimal impedances with data sheet. The impedance matching circuit for power amplifier is designed based on EM co-simulation using the optimal impedances. The fabricated power amplifier with 15${\times}$17.8 $mm^2$ shows the efficiency above 35 %, the power gain of 8.7~8.3 dB and the output power of 46.7~46.3 dBm at 9~9.5 GHz with pulsed-driving width of 10 usec and duty of 10 %.

Design of a Novel Instrumentation Amplifier using Current-conveyor(CCII) (전류-컨베이어(CCII)를 사용한 새로운 계측 증폭기 설계)

  • CHA, Hyeong-Woo;Jeong, Tae-Yun
    • Journal of the Institute of Electronics and Information Engineers
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    • v.50 no.12
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    • pp.80-87
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    • 2013
  • A novel instrumentation amplifier(IA) using positive polarity current-conveyor(CCII+) for electronic measurement systems with low cost, wideband, and gain control with wide range is designed. The IA consists of two CCII+, three resistor, and an operational amplifier(op-amp). The principal of the operating is that the difference of two input voltages applied into two CCII+ used voltage and current follower converts into same currents, and then these current drive resistor of (+) terminal and feedback resistor of op-amp to obtain output voltage. To verify operating principal of the IA, we designed the CCII+ and used commercial op-amp LF356. Simulation results show that voltage follower used CCII+ has offset voltage of 0.21mV at linear range of ${\pm}$4V. The IA had wide gain range from -20dB to 60dB by variation of only one resistor and -3dB frequency for the gain of 60dB was 400kHz. The IA also has merits without matching of external resistor and controllable offset voltage using the other resistor. The power dissipation of the IA is 130mW at supply voltage of ${\pm}$5V.