• Journal of the Korean Mathematical Society
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• v.42 no.4
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• pp.621-634
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• 2005

Let$P{\rightarrow}M$ be an oriented $S^2-fiber$ bundle over a closed manifold M and let Q be its associated SO(3)-bundle, then we investigate the ring structure of the cohomology of the total space P by constructing the coupling form TA induced from an SO(3) connection A. We show that the cohomology ring of total space splits into those of the base space and the fiber space if and only if the Pontrjangin class $p_1(Q)\;{\in}\;H^4(M;\mathbb{Z})$ vanishes. We apply this result to the twistor spaces of 4-manifolds.

• Communications of the Korean Mathematical Society
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• v.31 no.4
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• pp.857-868
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• 2016

Let (X, ${\mu}$) be a generalized topological space (GTS) and $\mathcal{H}$ be a hereditary class on X due to $Cs{\acute{a}}sz{\acute{a}}r$ [8]. In this paper, we define an operator $()^{\circ}:\mathcal{P}(X){\rightarrow}\mathcal{P}(X)$. By setting $c^{\circ}(A)=A{\cup}A^{\circ}$ for every subset A of X, we define the family ${\mu}^{\circ}=\{M{\subseteq}X:X-M=c^{\circ}(X-M)\}$ and show that ${\mu}^{\circ}$ is a GT on X such that ${\mu}({\theta}){\subseteq}{\mu}^{\circ}{\subseteq}{\mu}^*$, where ${\mu}^*$ is a GT in [8]. Moreover, we define and investigate ${\mu}^{\circ}$-codense and strongly ${\mu}^{\circ}$-codense hereditary classes.

• The KIPS Transactions:PartA
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• v.15A no.2
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• pp.95-100
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• 2008

In this paper, we propose a new interconnection network topology, hierarchical folded hyper-star network HFH($C_n,\;C_n$), which is based on folded hyper-star network. Our results show that the proposed hierarchical folded hyper-star network performs very competitively in comparison to folded hyper-star network and hierarchical network HCN(m,m), HFN(m,m) have been previously proposed, when diameter ${\times}$ degree is used as a network cost measure. We also investigate various topological properties of HFH($C_n,\;C_n$) including connectivity, routing algorithm, diameter, broadcasting.

• Korean Institute of Interior Design Journal
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• v.16 no.4
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• pp.89-98
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• 2007

This paper studied the spatial factors activating the personal interaction based on case studies of $M\'{e}diath\'{e}ques$ in France. The spatial factors are analyzed into material factors and dematerial factors. The material factors have physical features in space and directly or indirectly activate the personal interaction. They consist of 8 elements including pocket space, balcony, atrium, stairs, elevators, windows, conference rooms and furnitures. The dematerial factors consist of 6 elements including polycentrism, continuance, mixture, interpenetration, dematerialization, transparency. They are compounded of material factors and explain them conceptually. But dematerial factors are abstract concepts. To provide reliability I confirm the relationship with dematerial factors by using a connections, topology, a phased depth of the Depthmap as the framework of the visual recognition of the space syntax covering the characteristic of dematerial factors. The result of the quantitative analysis human-behavior in $V\'{e}nissieux$ $M\'{e}diath\'{e}que$ and the result of applying the spatial factors of $M\'{e}diath\'{e}ques$ as the community center to the $V\'{e}nissieux$ $M\'{e}diath\'{e}que$ proved that the spatial factors are significant factors of the $M\'{e}diath\'{e}ques$ as the community center.

• Journal of KIISE:Computer Systems and Theory
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• v.32 no.8
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• pp.393-398
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• 2005

In interconnection networks, a Hamiltonian path has been utilized in many applications such as the implementation of linear array and multicasting. In this paper, we consider the Hamiltonian properties of mesh networks which are used as the topology of parallel machines. If a network is strongly Hamiltonian laceable, the network has the longest path joining arbitrary two nodes. We show that a two-dimensional mesh M(m, n) is strongly Hamiltonian laceabie, if $m{\geq}4,\;n{\geq}4(m{\geq}3,\;n{\geq}3\;respectively)$, and the number of nodes is even(odd respectively). A mesh is a spanning subgraph of many interconnection networks such as tori, hypercubes, k-ary n-cubes, and recursive circulants. Thus, our result can be applied to discover the fault-hamiltonicity of such networks.

• Journal of the Korean Mathematical Society
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• v.58 no.3
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• pp.761-790
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• 2021

For given spaces X and Y, let map(X, Y) and map_*(X, Y) be the unbased and based mapping spaces from X to Y, equipped with compact-open topology respectively. Then let map(X, Y ; f) and map_*(X, Y ; g) be the path component of map(X, Y) containing f and map_*(X, Y) containing g, respectively. In this paper, we compute cohomotopy groups of suspended complex plane π^n+m(ΣⁿℂP²) for m = 6, 7. Using these results, we classify path components of the spaces map(ΣⁿℂP², S^m) up to homotopy equivalence. We also determine the generalized Gottlieb groups G_n(ℂP², S^m). Finally, we compute homotopy groups of mapping spaces map(ΣⁿℂP², S^m; f) for all generators [f] of [ΣⁿℂP², S^m], and Gottlieb groups of mapping components containing constant map map(ΣⁿℂP², S^m; *).

• Journal of the Institute of Electronics Engineers of Korea TC
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• v.43 no.11 s.353
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• pp.175-184
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• 2006

In this paper, we describe a 900MHz CMOS RF transceiver using an ISM band for ZigBee applications. The architecture of the designed rx front-end, which consists of a low noise amplifier, a down-mixer, a programmable gain amplifier and a band pass filter. And the tx front-end, which consists of a band pass filter, a programmable gain amplifier, an up-mixer and a drive amplifier. A low-if topology is adapted for transceiver architecture, and the total current consumption is reduced by using a low power topology. Entire transceiver is verified by means of post-layout simulation and is implemented in 0.18um RF CMOS technology. The fabricated chip demonstrate the measured results of -92dBm minimum rx input level and 0dBm maximum tx output level. Entire power consumption is 32mW(@1.8VDD). Die area is $2.3mm{\times}2.5mm$ including ESD protection diode pads.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.46 no.1
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• pp.52-58
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• 2009

A low voltage, low power delta-sigma modulator is proposed for cardiac pacemaker applications. A cascade of delta-sigma modulator stages that employ a feedforward topology has been used to implement a high-resolution oversampling ADC under the low supply. An inverter-based switched-capacitor circuit technique is used for low-voltage operation and ultra-low power consumption. An experimental prototype of the proposed circuit has been implemented in a $0.35-{\mu}m$ CMOS process, and it achieves 61-dB SNDR, 63-dB SNR, and 65-dB DR for a 120-Hz signal bandwidth at 7.6-kHz sampling frequency. The power consumption is only 280 nW at 1-V power supply.

• Proceedings of the KIPE Conference
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• 2001.10a
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• pp.295-300
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• 2001

A variety of high voltage DC power supplies employing the high frequency inverter are difficult to achieve soft switching considering a quick response and no overshoot response under the wide load variation ranges which are used in medical-use x-ray high voltage generator from 20kV to 150kV in the output voltage and from 0.5mA to 1250mA, respectively. The authors develops soft switching high voltage DC power supply designed for x-ray power generator applications, which uses series resonant inverter circuit topology with a multistage voltage multiplier instead of a conventional high voltage diode rectifier connected to the second-side of a high-voltage transformer with a large turn ratio. A constant on-time dual mode frequency control scheme operating under a principle of zero-current soft switching commutation is described. Introducing the multistage voltage multiplier, the secondary transformer turn-numbers and stray capacitance of high-voltage transformer is effective to be greatly reduced. It is proved that the proposed high-voltage converter topology with dual mode frequency modulation mode control scheme is able to be the transient response and steady-state performance in high-voltage x-ray tube load. The effectiveness of this high voltage converter is evaluated and discussed on the basis of simulation analysis and observed data in experiment.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.22 no.11
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• pp.1111-1116
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• 2011

In this paper, a 60 GHz bidirectional active phase shifter with 130 nm CMOS is presented by replacing CMOS passive switchs in switched-line type phase shifter with Common Gate Amplifier(bidirectional amplifier). Bidirectional active phase shifter is composed of bidirectional amplifier blocks and passive delay line network blocks. The suitable topology of bidirectional amplifier block is CGA(Common Gate Amplifier) topology and matching circuits of input and output are symmetrical due to design same characteristic of it's forward and reverse way. The direction(forward and reverse way) and amplitude of amplification can be controlled by only one bias voltage($V_{DS}$) using combination bias circuit. And passive delay line network blocks are composed of microstrip line. An 1-bit phase shifter is fabricated by Dongbu HiTek 1P8M 130-nm CMOS technology and simulation results present -3 dB average insertion loss and respectively 90 degree and 180 degree phase shift at 60 GHz.