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A Low-Voltage Low-Power Delta-Sigma Modulator for Cardiac Pacemaker Applications  

Chae, Young-Cheol (Department of Electrical and Electronic Eng., Yonsei University)
Lee, Jeong-Whan (Department of Electrical and Electronic Eng., Yonsei University)
Lee, In-Hee (Department of Electrical and Electronic Eng., Yonsei University)
Han, Gun-Hee (Department of Electrical and Electronic Eng., Yonsei University)
Publication Information
Journal of the Institute of Electronics Engineers of Korea SD / v.46, no.1, 2009 , pp. 52-58 More about this Journal
Abstract
A low voltage, low power delta-sigma modulator is proposed for cardiac pacemaker applications. A cascade of delta-sigma modulator stages that employ a feedforward topology has been used to implement a high-resolution oversampling ADC under the low supply. An inverter-based switched-capacitor circuit technique is used for low-voltage operation and ultra-low power consumption. An experimental prototype of the proposed circuit has been implemented in a $0.35-{\mu}m$ CMOS process, and it achieves 61-dB SNDR, 63-dB SNR, and 65-dB DR for a 120-Hz signal bandwidth at 7.6-kHz sampling frequency. The power consumption is only 280 nW at 1-V power supply.
Keywords
Cardiac pacemaker; Delta-sigma modulator; Feedforward topology; Switched-capacitor circuit; Inverter-based SC circuit technique;
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