• Journal of the Korean Institute of Electrical and Electronic Material Engineers
• /
• v.29 no.10
• /
• pp.635-640
• /
• 2016

This paper dealt with the deterioration characteristics and an on-line diagnosis equipment for SPDs (surge protective devices). An accelerated aging test was carried out using a $8/20{\mu}s$ standard lightning impulse current to analyze the changes of electrical characteristics and to propose the diagnostic parameters and the criterion for deterioration of ZnO varistor which is the core component of SPDs. Based on the experimental results, an on-line diagnosis equipment for SPD was fabricated, which can measure the total leakage current, reference and clamping voltage. The leakage current measurement circuit was designed using a low-noise amplifier and a clamp type ZCT. A linear controller, the leakage current measurement part and a HVDC were used in the measurement of reference voltage. The measurement circuit of clamping voltage consisted of a surge generator and a coupling circuit. In a calibration process, measurement error of the prototype equipment was less than 3%.

• The Journal of the Institute of Internet, Broadcasting and Communication
• /
• v.20 no.4
• /
• pp.129-133
• /
• 2020

In this paper, a temperature compensation circuit is presented in order to mitigate gain variability due to temperature in the W-band low-noise amplifier (LNA). The proposed cascode temperature compensation bias circuit automatically controls gate bias voltages of the common-source LNA in order to suppress variations of small-signal gain. The designed circuit was realized in a 100-nm GaAs pHEMT process. The simulated voltage gain of W-band LNA including the proposed bias circuit is >20 dB with gain variability less than ±0.8 dB in the range of temperatures between -35 to 71℃. We expect that the proposed circuit contributes to millimeter-wave receivers for stable performances in radar applications.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
• /
• v.21 no.3
• /
• pp.278-284
• /
• 2010

In this paper, a millimeter-wave detector using zero-bias schottky diode is designed and fabricated at W-band. It consists of LNA(Low Noise Amplifier) and detector module to improve sensitivity. LNA case with a highly stop-band characteristic is designed to prevent the oscillation by LNA MMIC chip. Diode detector of planar structure is fabricated for the easy connection with LNA module and zero bias Schottky diode is utilized. In practice, the fabricated diode detector have shown the detection voltage of 20~500 mV to the RF input power of -45~-20 dBm. The proposed W-band detector can be applicable to the passive millimeter image system.

• Journal of the Korea Institute of Information and Communication Engineering
• /
• v.8 no.2
• /
• pp.449-455
• /
• 2004

This paper presents a novel defect detection method for one chip RF front end with fault detection circuits using input matching measurement. We present a BIST circuit using 40.25{\mu}m$ CMOS technology. We monitor the input transient voltage of the RF front end to differentiate faulty and fault-free RF front end. Catastrophic as well as parametric variation fault models are used to simulate the faulty response of the RF front end. This technique has several advantages with respect to the standard approach based on current test stimulus and frequency domain measurement. Because DUT and fault detection circuits are implemented in the same chip, this test technique only requires use of digital voltmeter (RMS meter) and RF voltage source generator for simpleand inexpensive testing.

• Journal of the Institute of Electronics Engineers of Korea SD
• /
• v.43 no.12 s.354
• /
• pp.55-64
• /
• 2006

This work proposes a calibration-free 14b 70MS/s 0.13um CMOS ADC for high-performance integrated systems such as WLAN and high-definition video systems simultaneously requiring high resolution, low power, and small size at high speed. The proposed ADC employs signal insensitive 3-D fully symmetric layout techniques in two MDACs for high matching accuracy without any calibration. A three-stage pipeline architecture minimizes power consumption and chip area at the target resolution and sampling rate. The input SHA with a controlled trans-conductance ratio of two amplifier stages simultaneously achieves high gain and high phase margin with gate-bootstrapped sampling switches for 14b input accuracy at the Nyquist frequency. A back-end sub-ranging flash ADC with open-loop offset cancellation and interpolation achieves 6b accuracy at 70MS/s. Low-noise current and voltage references are employed on chip with optional off-chip reference voltages. The prototype ADC implemented in a 0.13um CMOS is based on a 0.35um minimum channel length for 2.5V applications. The measured DNL and INL are within 0.65LSB and l.80LSB, respectively. The prototype ADC shows maximum SNDR and SFDR of 66dB and 81dB and a power consumption of 235mW at 70MS/s. The active die area is $3.3mm^2$.

• Journal of the Institute of Electronics Engineers of Korea SD
• /
• v.43 no.11 s.353
• /
• pp.58-68
• /
• 2006

This work proposes a 10b 250MS/s $1.8mm^2$ 85mW 0.13um CMOS A/D Converter (ADC) for high-performance integrated systems such as next-generation DTV and WLAN simultaneously requiring low voltage, low power, and small area at high speed. The proposed 3-stage pipeline ADC minimizes chip area and power dissipation at the target resolution and sampling rate. The input SHA maintains 10b resolution with either gate-bootstrapped sampling switches or nominal CMOS sampling switches. The SHA and two MDACs based on a conventional 2-stage amplifier employ optimized trans-conductance ratios of two amplifier stages to achieve the required DC gain, bandwidth, and phase margin. The proposed signal insensitive 3-D fully symmetric capacitor layout reduces the device mismatch of two MDACs. The low-noise on-chip current and voltage references can choose optional off-chip voltage references. The prototype ADC is implemented in a 0.13um 1P8M CMOS process. The measured DNL and INL are within 0.24LSB and 0.35LSB while the ADC shows a maximum SNDR of 54dB and 48dB and a maximum SFDR of 67dB and 61dB at 200MS/s and 250MS/s, respectively. The ADC with an active die area of $1.8mm^2$ consumes 85mW at 250MS/s at a 1.2V supply.

• The Journal of Korean Institute of Communications and Information Sciences
• /
• v.41 no.11
• /
• pp.1566-1573
• /
• 2016

This paper presents a beam-forming receiver with polyphase In-phase/Quadrature-phase (I/Q) network for airborne communication. In beam-forming receiver, the insertion loss (IL) difference between input path increases the receiver noise figure (NF). The major element for generating IL difference is the impedance variation of phase shifter. In order to maintain a constant IL in every phase, this paper propose a lossless polyphase I/Q network based beam-forming receiver. The proposed lossless polyphase I/Q network has low Q-factor and high impedance for drive back-end VGA (Variable gain amplifier) block with low insertion loss. The 2-stage VGA controls in-phase and quadrature-phase amplitude level for vector summation. The proposed beam-forming receiver prototype is fabricated in TSMC $0.18{\mu}m$ CMOS process. The prototype cover the $360^{\circ}$ with $5.6^{\circ}$ LSB. The average RMS phase error and amplitude error is approximately $1.6^{\circ}$ and 0.3dB.

• Transactions of the Korean Society of Mechanical Engineers B
• /
• v.40 no.10
• /
• pp.629-636
• /
• 2016

This study presents the development of an acid resistance velocity sensor that is used for measuring velocity inside a copper sulfate plating bath. First, researchers investigated the acid resistance coating to confirm the suitability of the anti-acid sensor in a very corrosive environment. Then, researchers applied signal processing methods to reduce noise and amplify the signal. Next, researchers applied a pressure-resistive sensor with an operation amplifier (Op Amp) and low-pass filter with high impedance to match the output voltage of a commercial flowmeter. Lastly, this study compared three low-pass filters (Bessel, Butterworth and Chebyshev) to select the appropriate signal process circuit. The results show 0.0128, 0.0023, and 5.06％ of the mean square error, respectively. The Butterworth filter yielded more precise results when compared to a commercial flowmeter. The acid resistive sensor is capable of measuring velocities ranging from 2 to 6 m/s with a 2.7％ margin of error.

• Journal of Biomedical Engineering Research
• /
• v.35 no.5
• /
• pp.125-131
• /
• 2014

The purpose of this study is to verify the utility of reflected photoplethysmography sensor using two green light emitting diodes that influenced by ambient light. Recently it has been studied that green light emitting diode is suitable for light source of reflected photoplethysmography sensor at low temperature and high temperature. Another study showed that, green light is better for monitoring heart rate during motion than led light. However, it has a bad characteristic about ambient light noise. To verify the utility of reflected photoplethysmography sensor using green light emitting diode, this study measures the photoplethysmography signal that is distorted by ambient light and will propose a solution. This study has two parts of research method. One is measurement system that composed sensor and board. The sensor is made up PE-foam and Non-woven fabric for flexible sensor. The photoplethysmography signal is measured by measurement board that composed high-pass filter, low-pass filter and amplifier. Ambient light source is light bulb and white light emitting diode that has three steps brightness. Photoplethysmography signal is measured with lead II electrocardiography signal at the same time and it is measured at the finger and radial artery for 1 minute, 1000 Hz sampling rate. The lead II electrocardiography signal is a standard signal for heart rate and photoplethysmography signal that measured at the finger is a standard signal for waveform. The test is repeated 3 times using three sensor. The data is processed by MATLAB to verify the utility by comparing the correlation coefficient score and heart rate. The photoplethysmography sensor using two green light emitting diodes is shown better utility than using one green light emitting diode and red light emitting diode at the ambient light. The waveform and heart rate that measured by two green light emitting diodes are more identical than others. The amount of electricity used is less than red light emitting diode and error peak detectability factor is the lowest.

• Journal of the Institute of Electronics and Information Engineers
• /
• v.53 no.11
• /
• pp.25-31
• /
• 2016

Parasitic capacitance and resistance of FinFET transistors are the important components that determine the frequency performance of the circuit. Therefore, the researchers in our group developed more accurate parasitic capacitance and resistance for FinFETs than BSIM-CMG. To verify the RF performance, proposed model was applied to design an LNA that has $S_{21}$ more than 10dB and center frequency more than 60GHz using HSPICE. To verify the accuracy of the proposed model, mixed-mode capability of 3D TCAD simulator Sentaurus was used. $S_{21}$ of LNA was chosen as a reference to estimate the error. $S_{21}$ of proposed model showed 87.5% accuracy compared to that of Sentaurus in 10GHz~100GHz frequency range. The $S_{21}$ accuracy of BSIM-CMG model was 56.5%, so by using the proposed model, the accuracy of the circuit simulator improved by 31%. This results validates the accuracy of the proposed model in RF domain and show that the accuracies of the parasitic capacitance and resistance are critical in accurately predicting the LNA performance.