• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.27 no.12
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• pp.871-876
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• 2014

Efficiency of crystalline Si solar cell can be maximized as minimizing optical loss through antireflection texturing with inverted pyramids. Even if cost-competitive, soft lithography can be employed instead of photolithography for the purpose, some limitations still remain to apply the soft lithography directly to as-received solar grade wafer with a bunch of micro trenches on surface. Therefore, it is needed to develop a low-cost, effective planarization process and evaluate its output to be applicable to patterning process with PDMS stamp. In this study new surface planarization process is proposed and the change of micro scale trenches on the surface as a function of etching time is observed. Also, the effect of trenches on pattern quality by soft lithography is investigated using FEM structural analysis. In conclusion it is clear that the geometry and shape of trenches would be basic considerations for soft lithography application to low quality wafer.

• Proceedings of the Korean Society of Precision Engineering Conference
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• 2005.06a
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• pp.676-679
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• 2005

Nano imprint Lithography (NIL) is regarded as one of the next-generation lithography technologies with EUV lithography, immersion lithography, Laser interference lithography. Because a Si wafer stamp and a quartz stamp, used to imprinting usually are very expensive and easily broken, it is suggested that master stamp is duplicated by PDMS and the PDMS stamp uses to imprint .For using the PDMS stamp, a thermally curable monomer resin was used for the imprinting process to lower pressure and temperature. As a result, NIL patterns were successfully fabricated.

• Journal of the Korean Society of Manufacturing Technology Engineers
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• v.19 no.6
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• pp.834-840
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• 2010

Photo lithography process is very important technology to fabricate highly integrated micro patterns with high precision for semiconductor and display industries. Up to now, mask type lithography process has been generally used for this purpose; however, it is not efficient for small quantity and/or frequently changing products. Therefore, in order to obtain higher productivity and lower manufacturing cost, the mask type lithography process should be replaced. In this study, a maskless lithography system using the DMD(Digital Micromirror Device) is developed, and the exposure condition and optical properties are analyzed and simulated for a single beam case. From the proposed experimental conditions, required exposure experiments were preformed, and the results were investigated. As a results, 10${\mu}m$ spots can be generated at optimal focal length.

• Journal of the Korean Society for Precision Engineering
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• v.28 no.12
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• pp.1419-1424
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• 2011

Nanoimprint lithography is a next generation lithography technology, which enables to fabricate nano to micron-scale patterns through simple and low cost process. Nanoimprint lithography has been applied in various industry fields such as light emitting diodes, solar cells and display. Functional patterns, including anti-reflection moth-eye pattern, photonic crystal pattern, fabricated by nanoimprint lithography are used to improve overall efficiency of devices in that fields. For these reasons, in this study, sub-micron-scaled functional patterns were directly fabricated on Si and glass substrates by thermal imprinting process using ZnO nano-particles dispersion resin. Through the thermal imprinting process, arrays of sub-micron-scaled pillar and hole patterns were successfully fabricated on the Si and glass substrates. And then, the topography, components and optical property of the imprinted ZnO nano-particles/resin patterns are characterized by Scanning Electron Microscope, Energy-dispersive X-ray spectroscopy and UV-vis spectrometer, respectively.

• Proceedings of the KSME Conference
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• 2004.04a
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• pp.978-982
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• 2004

We present high aspect ratio 100nm-scale nickel stamper using e-beam lithography process and Cr/Qz mask for the injection molding process of nano grating patterns. Conventional photolithography blank mask (CrON/Cr/Qz) consists of quartz substrate, Cr layer of UV protection and CrON of anti-reflection layer. We have used Cr/Qz blank mask without anti-reflection layer of CrON which is non-conductive material and ebeam lithography process in order to simplify the nickel electroplating process. In nickel electroplating process, we have used Cr layer of UV protection as seed layer of nickel electroplating. Fabrication conditions of photolithography mask using e-beam lithography are optimized with respect to CrON/Cr/Qz blank mask. In this paper, we have optimized e-beam lithography process using Cr/Qz blank mask and fabricated nickel stamper using Cr seed layer. CrON/Cr/Qz blank mask and Cr/Qz blank mask require optimal e-beam dosage of $10.0{\mu}C/cm^2$ and $8.5{\mu}C/cm^2$, respectively. Finally, we have fabricated $116nm{\pm}6nm-width$ and $240nm{\pm}20nm-height$ nickel grating stamper for the injection molding pattern.

• Proceedings of the Korean Society of Precision Engineering Conference
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• 2005.06a
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• pp.1489-1492
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• 2005

Compared to other nano-patterning techniques, Nano imprint Lithography (NIL) has some advantages of high throughput and low process cost. To imprint low temperature and pressure, UV Nano imprint Lithography, which using the monomer based UV curable resin is suggested. Because fabrication of high fidelity pattern on topographical substrate is difficult, bi-layer Nano imprint lithography, which are consist of easily removable under-layer and imprinted pattern, is being used. If residual layer is not remained after imprinting, and under-layer is removed by oxygen RIE etching, we might be able to fabricate the bi-layer pattern for easy lift-off process.

• Journal of the Korean Society of Manufacturing Technology Engineers
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• v.20 no.4
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• pp.395-400
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• 2011

Scanning Probe Lithography is a method to localized oxidation on single crystal silicon wafer surface. This study demonstrates nanometer scale non contact lithography process on (100) silicon (p-type) wafer surface using AFM(Atomic force microscope) apparatuses and pulse controlling methods. AFM-based experimental apparatuses are connected the DC pulse generator that supplies ultra short pulses between conductive tip and single crystal silicon wafer surface maintaining constant humidity during processes. Then ultra short pulse durations are controlled according to various experimental conditions. Non contact lithography of using ultra short pulse induces electrochemical reaction between micro-scale tip and silicon wafer surface. Various growths of oxides can be created by ultra short pulse non contact lithography modification according to various pulse durations and applied constant humidity environment.

• Tribology and Lubricants
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• v.22 no.5
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• pp.243-251
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• 2006

Molecular dynamics simulations of nanoimprint lithography NIL) are performed in order to investigate effects of process parameters, such as stamp shape, imprinting temperature and adhesive energy, on nanoimprint lithography process and pattern transfer. The simulation model consists of an amorphous $SiO_{2}$ stamp with line pattern, an amorphous poly-(methylmethacrylate) (PMMA) film and an Si substrate under periodic boundary condition in horizontal direction to represent a real NIL process imprinting long line patterns. The pattern transfer behavior and its related phenomena are investigated by analyzing polymer deformation characteristics, stress distribution and imprinting force. In addition, their dependency on the process parameters are also discussed by varying stamp pattern shapes, adhesive energy between stamp and polymer film, and imprinting temperature. Simulation results indicate that triangular pattern has advantages of low imprinting force, small elastic recovery after separation, and low pattern failure. Adhesive energy between surface is found to be critical to successful pattern transfer without pattern failure. Finally, high imprinting temperature above glass transition temperature reduces the imprinting force.

• Transactions on Electrical and Electronic Materials
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• v.5 no.3
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• pp.104-108
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• 2004

Problems of overlap errors and side-lobe printing by the design rule reduction in the lithography process using attenuated phase-shifting masks(attPSM) have been serious. Overlap errors and side-lobes can be simultaneously solved by the rule-based correction using scattering bars with the rules extracted from test patterns. Process parameters affecting the attPSM lithography simulation have been determined by the fitting method to the process data. Overlap errors have been solved applying the correction rules to the metal patterns overlapped with contact/via. Moreover, the optimal insertion rule of the scattering bars has made it possible to suppress the side-lobes and to get additional pattern fidelity at the same time.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.18 no.5
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• pp.674-680
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• 2017

Touch Screen Panel (TSP) is a widely used personal handheld device and as a large display apparatus. This study examines micro bump fabrication technology for TSP test process. In the testing process, as TSP is changed, should make a new micro bump for probing and modify the testing program. In this paper we use a maskless lithography system to confirm the potential to fabricatemicro bump to reducecost and manufacturing time. The requiredmaskless lithography system does not use a mask so it can reduce the cost of fabrication and it flexible to cope with changes of micro bump probing. We conducted electro field simulation by pitches of micro bump and designed the lithography pattern image for the maskless lithography process. Then we conducted Photo Resist (PR) patterning process and electro-plating process that are involved in MEMS technology to fabricate micro bump.