• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.27 no.10
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• pp.618-622
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• 2014

The temperature dependent characteristics on the properties of SiC Schottky Diode has been investigated. In this study, the temperature dependent current-voltage characteristics of the SiC Schottky diode were measured in the range of 300 ~ 500 K. Divided into pre- and post- irradiated device was measured. The barrier height after irradiation device at 500 K increased 0.15 eV compared to 300 K, the barrier height of pre- neutron irradiated Schottky diode increased 0.07 eV. The effective barrier height after irradiation increased from 0.89 eV to 1.05 eV. And ideality factor of neutron irradiated Schottky diode at 500 K decreased 0.428 compared to 300 K, the ideality factor of pre- neutron irradiated Schottky diode decreased 0.354. Also, a slight positive shift in threshold voltage from 0.53 to 0.68 V. we analyzed the effective barrier height and ideality factor of SiC Schottky diode as function of temperature.

• JSTS:Journal of Semiconductor Technology and Science
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• v.15 no.1
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• pp.41-47
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• 2015

In this paper, the effective electron Schottky barrier height (${\Phi}_{Bn}$) of the Ni silicide/n-silicon (100) interface was studied in accordance with different thicknesses of the antimony (Sb) interlayer for high performance n-channel MOSFETs. The Sb interlayers, varying its thickness from 2 nm to 10 nm, were deposited by radio frequency (RF) sputtering on lightly doped n-type Si (100), followed by the in situ deposition of Ni/TiN (15/10 nm). It is found that the sample with a thicker Sb interlayer shows stronger ohmic characteristics than the control sample without the Sb interlayer. These results show that the effective ${\Phi}_{Bn}$ is considerably lowered by the influence of the Sb interlayer. However, the current level difference between Schottky diodes fabricated with Sb/Ni/TiN (8/15/10 nm) and Sb/Ni/TiN (10/15/10 nm) structures is almost same. Therefore, considering the process time and cost, it can be said that the optimal thickness of the Sb interlayer is 8 nm. The effective ${\Phi}_{Bn}$ of 0.076 eV was achieved for the Schottky diode with Sb/Ni/TiN (8/15/10 nm) structure. Therefore, this technology is suitable for high performance n-channel MOSFETs.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.31 no.6
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• pp.367-371
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• 2018

1,200 V class junction barrier schottky (JBS) diodes and schottky barrier diodes (SBD) were simultaneously fabricated on the same 4H-SiC wafer. The resulting diodes were characterized at temperatures from room temperature to 473 K and subsequently compared in terms of their respective I-V characteristics. The parameters deduced from the observed I-V measurements, including ideality factor and series resistance, indicate that, as the temperature increases, the threshold voltage decreases whereas the ideality factor and barrier height increase. As JBS diodes have both Schottky and PN junction structures, the proper depletion layer thickness, $R_{on}$, and electron mobility values must be determined in order to produce diodes with an effective barrier height. The comparison results showed that the JBS diodes exhibit a larger effective barrier height compared to the SBDs.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.35 no.3
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• pp.241-245
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• 2022

In this study, we measured and comparatively analyzed the characteristics of MPS (Merged Pin Schottky) diodes in 4H-SiC by changing the areal ratio between the Schottky and PN junction region. Increasing the temperature from 298 K to 473 K resulted in the threshold voltage shifting from 0.8 V to 0.5 V. A wider Schottky region indicates a lower on-resistance and a faster turn-on. The effective barrier height was smaller for a wider Schottky region. Additionally, the depletion layer became smaller under the influence of the reduced effective barrier height. The wider Schottky region resulted in the ideality factor being reduced from 1.37 to 1.01, which is closer to an ideal device. The leakage saturation current increased with the widening Schottky region, resulting in a 1.38 times to 2.09 times larger leakage current.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2001.07a
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• pp.279-282
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• 2001

The IBE(ion beam etching)-induced Schottky barrier variation which depends on various etching history related with ion energy, incident angle and etching time has been investigated using voltage-current, capacitance-voltage characteristics of metal-etched silicon contact and morphology of etched surface were studied using AFM(atomic force microscope). For ion beam etched n-type silicons, Schottky barrier is reduced according to ion beam energy. It can be seen that amount of donor-like positive charge created in the damaged layer is proportional to the ion energy. By contrary, for ion beam etched p-type silicons, the Schottky barrier and specific contact resistance are both increased. Not only etching time but also incident angle of ion beam has an effect on barrier height. Taping-mode AFM analysis shows increased roughness RMS(Root-Mean-Square) and depth distribution due to ion bombardment. Annealing in an N$_2$ ambient for 30 min was found to be effective in improving the diode characteristics of the etched samples and minimum annealing temperatures to recover IBE-induced barrier variation were related to ion beam energy.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2008.06a
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• pp.133-133
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• 2008

Recently, as the down-scailing of field-effect transistor devices continues, Schottky-barrier field-effect transistors (SB-FETs) have attracted much attention as an alternative to conventional MOSFETs. SB-FETs have advantages over conventional devices, such as low parasitic source/drain resistance due to their metallic characteristics, low temperature processing for source/drain formation and physical scalability to the sub-10nm regime. The good scalability of SB-FETs is due to their metallic characteristics of source/drain, which leads to the low resistance and the atomically abrupt junctions at metal (silicide)-silicon interface. Nevertheless, some reports show that SB-FETs suffer from short channel effect (SCE) that would cause severe problems in the sub 20nm regime.[Ouyang et al. IEEE Trans. Electron Devices 53, 8, 1732 (2007)] Because source/drain barriers induce a depletion region, it is possible that the barriers are overlapped in short channel SB-FETs. In order to analyze the SCE of SB-FETs, we carried out systematic studies on the Schottky barrier overlapping in short channel SB-FETs using a SILVACO ATLAS numerical simulator. We have investigated the variation of surface channel band profiles depending on the doping, barrier height and the effective channel length using 2D simulation. Because the source/drain depletion regions start to be overlapped each other in the condition of the $L_{ch}$~80nm with $N_D{\sim}1\times10^{18}cm^{-3}$ and $\phi_{Bn}$ $\approx$ 0.6eV, the band profile varies as the decrease of effective channel length $L_{ch}$. With the $L_{ch}$~80nm as a starting point, the built-in potential of source/drain schottky contacts gradually decreases as the decrease of $L_{ch}$, then the conduction and valence band edges are consequently flattened at $L_{ch}$~5nm. These results may allow us to understand the performance related interdependent parameters in nanoscale SB-FETs such as channel length, the barrier height and channel doping.

• JSTS:Journal of Semiconductor Technology and Science
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• v.13 no.5
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• pp.492-499
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• 2013

We have investigated the electrical properties of Ru/Ni/n-GaN Schottky structure using current-voltage (I-V) and capacitance-voltage (C-V) measurements at room temperature. The barrier height (${\Phi}_{bo}$) and ideality factor (n) of Ru/Ni/n-GaN Schottky structure are found to be 0.66 eV and 1.44, respectively. The ${\Phi}_{bo}$ and the series resistance ($R_S$) obtained from Cheung's method are compared with modified Norde's method, and it is seen that there is a good agreement with each other. The energy distribution of interface state density ($N_{SS}$) is determined from the I-V measurements by taking into account the bias dependence of the effective barrier height. Further, the interface state density $N_{SS}$ as determined by Terman's method is found to be $2.14{\times}10^{12}\;cm^{-2}\;eV^{-1}$ for the Ru/Ni/n-GaN diode. Results show that the interface state density and series resistance has a significant effect on the electrical characteristics of studied diode.

• ETRI Journal
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• v.39 no.6
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• pp.866-873
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• 2017

We propose a multilayered-substrate-based power semiconductor discrete device package for a low switching loss and high heat dissipation. To verify the proposed package, cost-effective, low-temperature co-fired ceramic, multilayered substrates are used. A bare die is attached to an embedded cavity of the multilayered substrate. Because the height of the pad on the top plane of the die and the signal line on the substrate are the same, the length of the bond wires can be shortened. A large number of thermal vias with a high thermal conductivity are embedded in the multilayered substrate to increase the heat dissipation rate of the package. The packaged silicon carbide Schottky barrier diode satisfies the reliability testing of a high-temperature storage life and temperature humidity bias. At $175^{\circ}C$, the forward current is 7 A at a forward voltage of 1.13 V, and the reverse leakage current is below 100 lA up to a reverse voltage of 980 V. The measured maximum reverse current ($I_{RM}$), reverse recovery time ($T_{rr}$), and reverse recovery charge ($Q_{rr}$) are 2.4 A, 16.6 ns, and 19.92 nC, respectively, at a reverse voltage of 300 V and di/dt equal to $300A/{\mu}s$.

• Electrical & Electronic Materials
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• v.2 no.1
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• pp.33-40
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• 1989

낮은 에너지(60KeV) 비소 이온주입으로 고종도의 얇은 표면층을 형성시켜 Pt-nSi 쇼트키 다이오드의 유효 장벽높이를 감소시켰다. 역방향 특성을 크게 저하시키지 않고 순방향 임계전압을 400mV에서 200mV로 낮추는데 필요한 이온주입량은 얇은 산화막(215.angs.)이 존재하는 상태에서 비소 이온주입을 한 경우는 9.0*$10^{12}$$cm^{-2}$이고, 산화막이 없는 상태에서 이온주입한 경우는 5.1*$10^{12}$$cm^{-2}$이었다. 이온주입후 열처리 조건은 900.deg.C에서 30분간 N$_{2}$분위기에서 행하였으며 얇은 산화막을 통한 이온주입으로 다이오드의 역방향 특성을 개선하였다.