• Title/Summary/Keyword: dB-linear

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An Inherently dB-linear All-CMOS Variable Gain Amplifier

  • Kwon, Ji-Wook;Ryu, Seung-Tak
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.11 no.4
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    • pp.336-343
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    • 2011
  • This paper introduces a simple variable gain amplifier (VGA) structure that shows an inherently dB-linear gain control property. Requiring no additional components for dB-linear control, the structure is compact and power efficient. The designed two-stage VGA shows a gain control range of 60dB with the gain error in the range of ${\pm}0.4$ dB. The power consumption including the output buffer is 20.4 mW from 1.2 V supply voltage with bandwidth of 630 MHz. The prototype was fabricated in a 0.13 ${\mu}m$ CMOS process and the VGA core occupies 0.06 $mm^2$.

10MHz/77dB dynamic range CMOS linear-in-dB variable gain amplifiers (10MHz/77dB 다이내믹 영역을 가진 선형 가변 이득 증폭기)

  • Cha, Jin-Youp;Yeo, Hwan-Seok;Kim, Do-Hyung;Burm, Jin-Wook
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.44 no.8
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    • pp.16-21
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    • 2007
  • CMOS variable gain amplifier (VGA) IC designs for the structure monitoring systems of the telemetries were developed. A three stage cascaded VGA using a differential amplifier and a linear-in-dB controller is presented. A proposed VGA is a modified version of a conventional VGA such that the gain is controlled in a linear-in-dB fashion through the current ratio. The proposed VGA circuit introduced in this paper has a dynamic range of 77 dB with 1.5 dB gain steps. It also achieved a gain error of less than 1.5 dB over 77 dB gain range. The VGA can operate up to 10MHz dissipating 13.8 mW from a single 1.8 V supply. The core area of the VGA fabricated in a Magnachip $0.18{\mu}m$ standard CMOS process was about $430{\mu}m{\times}350{\mu}m$. According to measurement results, we can verify that the proposed method is reasonable with regard to the enhancement of dynamic range and the better linear-in-dB characteristics.

dB-Linear CMOS Variable Gain Amplifier for GPS Receiver (dB-선형적 특성을 가진 GPS 수신기를 위한 CMOS 가변 이득 증폭기)

  • Jo, Jun-Gi;Yoo, Chang-Sik
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.48 no.7
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    • pp.23-29
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    • 2011
  • A dB-linearity improved variable gain amplifier (VGA) for GPS receiver is presented. The Proposed dB-linear current generator has improved dB-linearity error of ${\pm}0.15$dB. The VGA for GPS is designed using proposed dB-linear current generator and composed of 3 stage amplifiers. The IF frequency is assumed as 4MHz and the linearity requirement of the VGA for GPS receiver is defined as 24dBm of IIP3 using cascaded IIP3 equation and the VGA satisfies 24dBm when minimum gain mode. The DC-offset voltage is eliminated using DC-offset cancelation loop. The gain range is from -8dB to 52dB and the dB-linearity error satisfies ${\pm}0.2$dB. The 3-dB frequency has range of 35MHz~106MHz for the gain range. The VGA is designed using 0.18${\mu}m$ CMOS process. The power consumption is 3mW with 1.8V supply voltage.

Julia operators and linear systems

  • Yang, Mee-Hyea
    • Communications of the Korean Mathematical Society
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    • v.12 no.4
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    • pp.895-904
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    • 1997
  • Let B(z) be a power series with operator coefficients where multiplication by B(z), T, is a contractive and everywhere defined transforamtion in the square summable power series. Then there is a Julia operator U for T such that $$ U = (T D)(\tilde{D}^* L) \in B(H \oplus D, K \oplus \tilde{D}), $$ where D is the state space of a conjugate canonical linear system with transfer function B(z).

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Circular Polarization Circular Microstrip Antenna using the Perturbation Effect (Perturbation 효과를 이용한 원편파 원형 마이크로스트립 안테나)

  • Ryu, Mi-Ra;Woo, Jong-Myung;Hur, Jung
    • Proceedings of the Korea Electromagnetic Engineering Society Conference
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    • 2005.11a
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    • pp.293-296
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    • 2005
  • This paper presents the design of linear and circular polarization baseball- shaped circular microstrip antenna (BCMA) with 3-dimensional structure using perturbation effect to reduce its size, which runs at 1.575GHz frequency bandwidth. As a result, the size of linear polarized antenna could be reduced up to 23.7% in patch diameter and 41.8% in its area. Linear polarized antenna has -26.04dB of return loss, 69MHz(4.38%) of -l0dB bandwidth, 4.51dBd of gain, and its -3dB beamwidth are 99$^{\circ}$ in E-plane, 83$^{\circ}$ in H-plane. Circular polarized antenna has -17.43dB of return loss, 113.7MHz(7.2%) of -l0dB bandwidth, 2dBd of gain, 2dB of axial ratio and its -3dB beamwidth are 87$^{\circ}$, 86$^{\circ}$ x-axis polarized, 80$^{\circ}$, 84$^{\circ}$ y-axis polarized. It has 82mm of diameter, which is 28.5% of linear polarized CMPA. Therefore, in this paper we verified that baseball-shaped 3-dimensional structure of circular microstrip patch antenna applied with perturbation effect is appropriate for miniaturization.

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UA Study on the Polarization Selective Antenna for UHF RFID System (UHF RFID 시스템을 위한 Polarization selective 안테나 연구)

  • Lee, Sa-Won;Song, Woo-Yong
    • Journal of the Korea Society of Computer and Information
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    • v.15 no.7
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    • pp.67-74
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    • 2010
  • TIn this paper, it is designed the polarization selective antenna for UHF RFID system. The proposed antenna is consist of microstrip patch antenna with dual feeding and two SPDT switches and a SP4T switch and 3dB hybrid coupler. Through control of voltage of switches, the proposed reader antenna can select horizontally linear polarization, vertically linear polarization, left-hand circular polarization (LHCP) and right hand circular polarization (RHCP). The proposed reader antenna satisfied 2:1 VSWR at 902MHz~928MHz. and it has under 3dB AR(axial ratio). Peak gain of antenna is 7.71dBi, 7.55dBi with linear polarization and 7.31dBic, 7.81dBic with circular polarization at x-y plane. Also Axial ratio of antenna is 2.01~2.83dB and 2.02~2.60dB respectively. It is satisfied 3dB axial ratio.

LNA Module Development for the Ka-Band Satellite Transponder (Ka-대역 위성중계기용 저잡음 증폭기 모듈 개발)

  • 유영근;염인복
    • Proceedings of the IEEK Conference
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    • 1998.10a
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    • pp.323-326
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    • 1998
  • A LNA(Low Nosise Amplifer) module for the Ka-band satellite transponder has been developed, which is composed of developed two MMIC chips and 50$\Omega$ line. This LNA exhibited noise figure less than 3.12dB, linear gain higher than 32dB from 30.085GHz to 30.885GHz frequency range. Temperature test from $20^{\circ}to$ $60^{\circ}C$ of the LNA Module showed very small noise figure and linear gain variation of 0.2 dB and 0.4dB.

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AN IDENTITY ON STANDARD OPERATOR ALGEBRA

  • SHUJAT, FAIZA
    • Journal of applied mathematics & informatics
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    • v.40 no.5_6
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    • pp.1129-1135
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    • 2022
  • The purpose of this research is to find an extension of the renowned Chernoff theorem on standard operator algebra. Infact, we prove the following result: Let H be a real (or complex) Banach space and 𝓛(H) be the algebra of bounded linear operators on H. Let 𝓐(H) ⊂ 𝓛(H) be a standard operator algebra. Suppose that D : 𝓐(H) → 𝓛(H) is a linear mapping satisfying the relation D(AnBn) = D(An)Bn + AnD(Bn) for all A, B ∈ 𝓐(H). Then D is a linear derivation on 𝓐(H). In particular, D is continuous. We also present the limitations on such identity by an example.

A Hybrid Audio ${\Delta}{\Sigma}$ Modulator with dB-Linear Gain Control Function

  • Kim, Yi-Gyeong;Cho, Min-Hyung;Kim, Bong-Chan;Kwon, Jong-Kee
    • ETRI Journal
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    • v.33 no.6
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    • pp.897-903
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    • 2011
  • A hybrid ${\Delta}{\Sigma}$ modulator for audio applications is presented in this paper. The pulse generator for digital-to-analog converter alleviates the requirement of the external clock jitter and calibrates the coefficient variation due to a process shift and temperature changes. The input resistor network in the first integrator offers a gain control function in a dB-linear fashion. Also, careful chopper stabilization implementation using return-to-zero scheme in the first continuous-time integrator minimizes both the influence of flicker noise and inflow noise due to chopping. The chip is implemented in a 0.13 ${\mu}m$ CMOS technology (I/O devices) and occupies an active area of 0.37 $mm^2$. The ${\Delta}{\Sigma}$ modulator achieves a dynamic range (A-weighted) of 97.8 dB and a peak signal-to-noise-plus-distortion ratio of 90.0 dB over an audio bandwidth of 20 kHz with a 4.4 mW power consumption from 3.3 V. Also, the gain of the modulator is controlled from -9.5 dB to 8.5 dB, and the performance of the modulator is maintained up to 5 nsRMS external clock jitter.

The Design and Performance Analysis of Physical Layer for VDL Mode-2 (VDL Mode-2 물리 계층 설계 및 성능 분석)

  • Choi, Jun-Su;Lee, Han-Seong;Kim, Tae-Sik;Kim, In-Kyu;Kim, Hyoun-Kyoung
    • Journal of Advanced Navigation Technology
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    • v.11 no.1
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    • pp.17-23
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    • 2007
  • This paper, describes the VDR physical layer design in VDL Mode-2 in order to meet the requirements of International standards. VDR's frequency band is 117.975~137MHz, and CSMA(Carrier Sense Multiple Access), D8PSK(Differential Eight Phase Shift Keyed), 25KHz's channel bandwidth use. The analysis of the isolated channel from near channels, sensitivity of the receiver, dynamic range of the receiver, linear of the transmitter and energy of spurious for linear and non-linear simulation as a requirement condition of performance of VDR and teaches the course of design. The transmitting power level should be lower than 5dB from Po1dB point and the selected IF frequency is 45MHz to suppress the spurious signals. The receiver designed has 4.5dB of Noise figure, 27.52dB of Es/No, Mixer isolation up to 30dB, IIP3 power of LNA up to +10dBm to minimize the intermodulation.

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