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http://dx.doi.org/10.4218/etrij.11.0111.0293

A Hybrid Audio ${\Delta}{\Sigma}$ Modulator with dB-Linear Gain Control Function  

Kim, Yi-Gyeong (Convergence Components & Materials Research Laboratory, ETRI)
Cho, Min-Hyung (Convergence Components & Materials Research Laboratory, ETRI)
Kim, Bong-Chan (Convergence Components & Materials Research Laboratory, ETRI)
Kwon, Jong-Kee (Convergence Components & Materials Research Laboratory, ETRI)
Publication Information
ETRI Journal / v.33, no.6, 2011 , pp. 897-903 More about this Journal
Abstract
A hybrid ${\Delta}{\Sigma}$ modulator for audio applications is presented in this paper. The pulse generator for digital-to-analog converter alleviates the requirement of the external clock jitter and calibrates the coefficient variation due to a process shift and temperature changes. The input resistor network in the first integrator offers a gain control function in a dB-linear fashion. Also, careful chopper stabilization implementation using return-to-zero scheme in the first continuous-time integrator minimizes both the influence of flicker noise and inflow noise due to chopping. The chip is implemented in a 0.13 ${\mu}m$ CMOS technology (I/O devices) and occupies an active area of 0.37 $mm^2$. The ${\Delta}{\Sigma}$ modulator achieves a dynamic range (A-weighted) of 97.8 dB and a peak signal-to-noise-plus-distortion ratio of 90.0 dB over an audio bandwidth of 20 kHz with a 4.4 mW power consumption from 3.3 V. Also, the gain of the modulator is controlled from -9.5 dB to 8.5 dB, and the performance of the modulator is maintained up to 5 nsRMS external clock jitter.
Keywords
Delta-sigma modulator; hybrid delta-sigma odulator; chopper stabilization (CHS); return-to-zero (RZ) DAC; RZ DAC; RTZ DAC; programmable gain amplifier (PGA); dB-linear;
Citations & Related Records
Times Cited By KSCI : 3  (Citation Analysis)
Times Cited By Web Of Science : 0  (Related Records In Web of Science)
Times Cited By SCOPUS : 0
연도 인용수 순위
1 K. Nguyen et al., "A 106-dB SNR Hybrid Oversampling Analog-to-Digital Converter for Digital Audio," IEEE J. Solid-State Circuits, vol. 40, no. 12, Dec. 2005, pp. 2408-2415.   DOI
2 S.D. Kulchycki et al., "A 77-dB 7.5-MHz Hybrid Continuous-Time/Discrete-Time Cascaded ${\Sigma}{\Delta}$ Modulator," IEEE J. Solid-State Circuits, vol. 43, no. 4, Apr. 2008, pp. 796-804.   DOI
3 P. Morrow et al., "A 0.18 ${\mu}m$ 102 dB-SNR Mixed CT SC Audio-Band ADC," IEEE Int. Solid-State Circuits Conf. Dig. Tech. Papers, 2005, pp. 178-179.
4 M.Y. Choi et al., "A 101-dB SNR Hybrid Delta-Sigma Audio ADC Using Post Integration Time Control," Proc. IEEE Custom Integr. Circuits Conf., 2008, pp. 89-92.
5 E. Prosalentis and G.S. Tombras, "Elimination of Idle Tones by a 2-Bit Adaptive Sigma-Delta Modulation System," ETRI J., vol. 31, no. 4, Aug. 2009, pp. 393-398.   DOI
6 R.T. Baird and T.S. Fiez, "Linearity Enhancement of Multibit ${\Sigma}{\Delta}$ A/D and D/A Converters Using Data Weighted Averaging," IEEE Trans. Circuits Syst. II, Analog Digit. Signal Process., vol. 42, no. 12, Dec. 1995, pp. 753-762.   DOI   ScienceOn
7 S.R. Norsworthy, R. Schreier, and G.C. Temes, Delta-Sigma Data Converters: Theory, Design and Simulation, New York: IEEE Press, 1996.
8 R. Schreier and G.C. Temes, Understanding Delta-Sigma Data Converters, Piscataway, NJ: IEEE Press, 2005.
9 Y.G. Kim and J.K. Kwon, "Multi-bit Sigma-Delta Modulator for Low Distortion and High-Speed Operation," ETRI J., vol. 29, no. 6, Dec. 2007, pp. 835-837.   DOI
10 Y.D. Jeon et al., "A 1.2 V 12 b 60 MS/s CMOS Analog Front-End for Image Signal Processing," ETRI J., vol. 31, no. 6, Dec. 2009, pp. 717-724.   DOI
11 A.B. Early, "Chopper Stabilized Delta-Sigma Analog-to-Digital Converter," U.S. Patent 4, 939,516, to Crystal Semiconductor, 1990.
12 Y.G. Kim et al., "A 105.5 dB, 0.49 $mm^2$ Audio ${\Sigma}{\Delta}$ Modulator Using Chopper Stabilization and Fully Randomized DWA," Proc. IEEE Custom Integr. Circuits Conf., San Jose, CA, 2008, pp. 503-506.
13 R. Adams, K.Q. Nguyen, and K. Sweetland, "A 113-dB SNR Oversampling DAC with Segmented Noise-Shaped Scrambling," IEEE J. Solid-State Circuits, vol. 33, no. 12, Dec. 1998, pp. 1871-1878.   DOI   ScienceOn
14 O. Olieai and H. Aboushady, "Jitter Effects in Continuous-Time Sigma-Delta Modulators with Delayed Return-to-Zero Feedback," Proc. IEEE ISCAS, vol. 46, June 1998, pp. 991-1001.
15 E. Fogleman, J. Welz, and I. Galton, "An Audio ADC Delta-Sigma Modulator with 100-dB Peak SINAD and 102-dB DR Using a Second-Order Mismatch-Shaping DAC," IEEE J. Solid-State Circuits, vol. 36, no. 3, 2001, pp. 339-348.   DOI   ScienceOn