• 한국전기전자재료학회논문지
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• 제26권10호
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• pp.713-719
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• 2013

Power MOSFET operate voltage-driven devices, design to control the large power switching device for power supply, converter, motor control, etc. We have optimal designed planar and trench gate power MOSFET for high breakdown voltage and low on resistance. When we have designed $6,580{\mu}m{\times}5,680{\mu}m$ of chip size and 20 A current, on resistance of trench gate power MOSFET was low than planar gate power MOSFET. The on state voltage of trench gate power MOSFET was improved from 4.35 V to 3.7 V. At the same time, we have designed unified field limit ring for trench gate power MOFET. It is Junction Termination Edge type. As a result, we have obtained chip shrink effect and low on resistance because conventional field limit ring was convert to unify.

• 전력전자학회논문지
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• 제4권1호
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• pp.99-104
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• 1999

최근 산업이 대규모화함에 따라 고압 전력 변환 장치의 필요성이 증가하고 있고, 이에 따라 전력용 반도체 소자의 직렬 구동이 많이 이용되고 있다. 소자의 직렬 구동은 소자간에 적절한 전압 분배가 이루어져 개별 소자에 정격이상의 과전압이 인가되는 것을 방지하는 것이 큰 관건이다. 또한 고전압 회로에서는 부유 인덕턴스에 의한 소자의 과전압도 방지하여야 한다. 본 논문에서는 직렬 연결된 IGBT의 턴-오프 과도상태시 컬렉터 전압 기울기 조절로 안정된 전압 분배와 과전압을 방지하는 새로운 게이트 구동기법을 제안한다. 제안하는 게이트 구동기법은 컬렉터 전압을 검출하여 능동적으로 게이트 신호를 제어함으로써 과전압을 제한한다. 새로운 IGBT 게이트 구동회로를 제작하고 직렬 연결된 IGBT 회로에 적용하여 게이트 구동기법의 타당성을 검증하였다.

• Journal of Information Display
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• 제7권3호
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• pp.27-30
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• 2006

This paper presents a comprehensive study on threshold voltage $(V_{th})$ control of organic thin-film transistors (OTFTs) with dual-gate structure. The fabrication of dual-gate pentacene OTFTs using plasma-enhanced atomic layer deposited (PEALD) 150 nm thick $Al_{2}O_{3}$ as a bottom gate dielectric and 300 nm thick parylene or PEALD 200 nm thick $Al_{2}O_{3}$ as both a top gate dielectric and a passivation layer was investigated. The $V_{th}$ of OTFT with 300 nm thick parylene as a top gate dielectric was changed from 4.7 V to 1.3 V and that with PEALD 200 nm thick $Al_{2}O_{3}$ as a top gate dielectric was changed from 1.95 V to -9.8 V when the voltage bias of top gate electrode was changed from -10 V to 10 V. The change of $V_{th}$ of OTFT with dual-gate structure was successfully investigated by an analysis of electrostatic potential.

• JSTS:Journal of Semiconductor Technology and Science
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• 제13권3호
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• pp.237-244
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• 2013

A continuous, explicit drain-current equation for short-channel double-gate (DG) MOSFETs has been derived based on the explicit surface potential equation. The model is physically derived from Poisson's equation in each region of operation and adopted in the unified regional approach. The proposed model has been verified with numerical solutions, physically scalable with channel length and gate/oxide materials as well as oxide/channel thicknesses.

• 대한전기학회:학술대회논문집
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• 대한전기학회 1995년도 하계학술대회 논문집 B
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• pp.919-921
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• 1995

In this paper, development of Thermal Printer Head(TPH) controller by using gate array having high reliability and good performance is proposed. Over the 3000 gates are performed to control print image data signals and relative peripheral hardwares. The proposed gate array has TPH control circuit, print control and step motor drive, and print image data control, decoder output control parts. This TPH controller will be a good application to FAX or label printer and barcode printers.

• 전자공학회논문지D
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• 제34D권9호
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• pp.56-63
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• 1997

There generally exists a large variation in the thereshold voltages of the flash EEPROM cells after they are erased by using th fowler-nordheim tunneling, thereby getting some cells to be overeased. If the overerased cells are programmed with the conventional one-step programming scheme where an 12-13V pulse with the duration of 100.mu.S is applie don the control gate for the programming, they can suffer from the significant degradation of the reliability of the gate oxide. A two-step programming schem, where an 8/12 V pulse with a duration of 50.mu.S for each voltage is applied on the control gate for the programming, has been studied to solve the problem. The experimental results hav eshown that there is little difference in the programming characteristics between those two schemes, whereas the degradation of the gate oxide due to the programming can be significantly reduced with the two-step programming scheme compared to that with the one-step programming scheme. This is possibly because the positive charge stored in the floating gate of the overerased cells is compensate dwith the electrons injected into the floating gate while the 8V pulse is applied on the control gate, which leaves the overerased cells in the normally erased state after the duration of the 8V pulse.

• 한국정보디스플레이학회:학술대회논문집
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• 한국정보디스플레이학회 2006년도 6th International Meeting on Information Display
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• pp.1103-1106
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• 2006

We have presented a comprehensive study on threshold voltage $(V_{th})$ control of organic thin-film transistors (OTFTs) with dual-gate structure. The fabrication of dual-gate pentacene OTFTs using plasma-enhanced atomic layer deposited (PEALD) 150 nm thick $Al_2O_3$ as a bottom gate dielectric and 300 nm thick parylene or PEALD 200 nm thick $Al_2O_3$ as both a top gate dielectric and a passivation layer is reported. The $V_{th}$ of OTFT with 300 nm thick parylene as a top gate dielectric is changed from 4.7 V to 1.3 V and that with PEALD 200 nm thick $Al_2O_3$ as a top gate dielectric is changed from 1.95 V to -9.8 V when the voltage bias of top gate electrode is changed from -10 V to 10 V. The change of $V_{th}$ of OTFT with dual-gate structure has been successfully understood by an analysis of electrostatic potential.

• 한국항행학회논문지
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• 제16권1호
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• pp.62-69
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• 2012

다중제어 Toffoli(multiple-control Toffoli, MCT) 게이트는 원시 게이트에 의존적인 양자 기술을 필요로 하는 매크로 레벨 다치(multiple-valued) 게이트이며, Galois Field sum-of-product(GFSOP)형 양자논리 함수의 합성에 사용되어 왔다. 가역 논리는 저전력 회로 설계를 위한 양자계산(quantum computing, QC)에서 매우 중요하다. 본 논문은 먼저 GF4 가역 승산기를 제안한 후 GF4 승산기 기반의 quaternary MCT 게이트 실현을 제안하였다. MCT 게이트 실현을 위한 비교에서 제안한 MCT 게이트가 다중제어 입력이 증가할수록 종전의 작은 MCT 게이트 합성 방법보다 원시 게이트 수와 게이트 지연을 상당량 줄일 수 있음을 보였다.

• 한국정보디스플레이학회:학술대회논문집
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• 한국정보디스플레이학회 2002년도 International Meeting on Information Display
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• pp.717-720
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• 2002

In this work, the electrical characteristics of organic thin film transistors with the surface-treated organic gate insulators have been studied. For the surface treatment, the simple rubbing technique was used. The field effect mobilities of the devices with PVP gate insulator was improved about four times as high as those of TFTs without the insulator surface treatment.

• 대한전기학회:학술대회논문집
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• 대한전기학회 1999년도 하계학술대회 논문집 F
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• pp.2783-2785
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• 1999

A fast switching gate driver suitable for high performance self resonant electronic ballasts is presented. The proposed gate driver has negligible switching loss and driving loss owing to pnpn structure and zero voltage switching( ZVS ); moreover, the gate driver has frequency control capability. Therefore, a self resonant inverter using proposed gate driver can operate as external exciting resonant inverters. The experiments confirm that the proposed gate driver perform the desired operations over full power control range for 40W fluorescent lamp electronic ballast.