• Proceedings of the KIEE Conference
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• 1998.11a
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• pp.176-178
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• 1998

Recently, Control method of induction Motor is applied in full circuit model, as circular diagram. In Elevetor moderization problem, there is no circuit information. Nothing but, Motor terminal voltage and HP of motor. So, in this study, using KS induction Motor table, try to solve initial valve problem and make some implementations of manual tuning for use of automatic tuning of induction motor parameter.

• Journal of the Korean Institute of Telematics and Electronics B
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• v.32B no.6
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• pp.868-875
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• 1995

This paper presents a method of constructing the multiple-valued combinational logic systems(MVCLS) by decision diagram. The switching function truth table of MVCLS is transformed into canonical normal form of sum-of-products(SOP) with literals at first. Next, the canonical normal form of SOP is transfered into multiple-valued logic decision diagram(MVLDD). The selecting of variable ordering is very important in this stage. The MVLDDs are quite different from each other according to the variable ordering. Sometimes the inadequate variable ordering produces a very large size of MVLDD means the large size of circuit implementation. An algorithm for generating the proper variable ordering produce minimal MVLDD and an example shows the verity of the algorithm. The circuits are realized with T-gate acceording to the minimal MVLDD.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.22 no.2
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• pp.318-324
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• 1997

Chua's circuit is a simple electronic network which exhibits a variety of bifurcation and attractors. The circuit consists of two capacitors, a linear resistor, and a nonlinear resistor. In this papre we analyze a circuit obtained by replacing the parallel LC resonator in the Chua's circuit by lossless transmission line. By using the method of characteristics of this circuit we show that various periodic motions and chaotic motions can the attained according to parameter variations. From Chua's circuit with a lossless transmission line a variely of chaotic attractors which are similar to those of the normal Chua's circuit are observed.

• 전기의세계
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• v.22 no.1
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• pp.42-51
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• 1973

The contriving equivalent circuit of single phase induction motor which does not separate the primary leakage reactance and the secondary leakage reactance by the revolving field theory, and the graphically calculating method of the characteristics with T-type circle diagram of three phase induction motor which does not suppose the primary leakage reactance can be drawn up only by the no load test, the lock test, and measuring the resistance of stator winding are suggested in this paper. The method which can calculate the parameters of the equivalent circuit and the characteristics with no load test, lock test and measuring resistance of stator windings is suggested in this paper. Considered the exciting current in lock test, we could calculate very accurate characteristics of the single phase induction motor.

• Proceedings of the IEEK Conference
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• 2000.07a
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• pp.359-362
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• 2000

In this paper, we propose a test pattern generation algorithm on the basis of the identification of undetectable faults for Speed-Independent(SI) asynchronous control circuits. The proposed methodology generates tests from the specification of a target circuit, which describes the behavior of the circuit in the form of Signal Transition Graph (STG). The proposed identification method uses only topological information of a target circuit and reachability information of a fault-free circuit, which is generated in the form of Binary Decision Diagram(BDD) during pre-processing. Experimental results show that high fault coverage over single input stuck-at fault model is obtained for several synthesized SI circuits and the use of the identification process as a preprocessing decreases execution time of the proposed test generation with negligible costs.

• JSTS:Journal of Semiconductor Technology and Science
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• v.11 no.1
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• pp.15-22
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• 2011

Interconnect lines with inter-layer vias are experimentally characterized by using high-frequency S-parameter measurements. Test patterns are designed and fabricated using a package process. Then they are measured using Vector Network Analyzer (VNA) up to 25 GHz. Modeling a via as a circuit, its model parameters are determined. It is shown that the circuit model has excellent agreement with the measured S-parameters. The signal integrity of the lines with inter-layer vias is evaluated by using the developed circuit model. Thereby, it is shown that via may have a substantially deteriorative effect on the signal integrity of high-speed integrated circuits.

• Journal of The Korean Association For Science Education
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• v.22 no.5
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• pp.944-956
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• 2002

The purpose of this study was to investigate students' conceptions of the simple electric circuit using a battery and a bulb. 19 fourth grade students from a rural elementary school in Korea participated in this study. Data on the children's understandings of electric circuit were collected through three sources; prediction tests, drawing tests and individual interviews. The prediction tests were paper and pencil tests composed of 10 problems, predicting whether bulbs in 10 simple circuit diagrams would light. For each prediction, the children were asked to provide a written explanation of their thinking. The drawing tests consisted of 6 problems. One was to draw the inside of the bulb base, and the others were to make the wire connections between a battery and a bulb in the diagrams, to light the bulb. The interviews were conducted with seven children who showed differing degrees of understanding. No student was aware of the wire connections inside the bulb base. Many students stated whether the bulb would light or not, according to the tip of the bulb contacting the positive battery terminal and an end of wire contacting the negative battery terminal. Most of them thought that the tip of the bulb should contact the positive battery terminal, so that the bulb would light. In short, students did not use a scientific conception of electric current to predict and explain the electric circuit.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.46 no.7
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• pp.1-6
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• 2009

This paper presents new high speed architecture using DBI(Data Bus Inversion) in DRAM. The DBI is one of the general methods in the signaling circuits to decrease the known problems such as SSO and LSI. Many architectures have been proposed to reduce the number of transitions on the data bus. In this paper, the DBI, the Analog Majority Voter (AMV) circuit, the GIO control circuit and the SSO algorithm are newly proposed. The power consumption can he reduced with the help of direct GIO inversion method and the eye diagram of data can be increased to 40ps. Using proposed DBI scheme can produce almost stable SI of DQs against high speed operation. The DBI is fabricated in 90nm CMOS Technology.

• Proceedings of the KIEE Conference
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• 2003.10b
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• pp.63-65
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• 2003

In the case of the large motors which can't direct load tests, IEEE 112 equivalent circuit test was selected instead of the circle diagram method in the newly KEPIC's code. According to the change of code, Hyosung established an equivalent circuit test method based on Standard IEEE 112. In this paper, we compared the test results between IEEE 112 and other standards, CSA C-390, JEC2137 for the large motors.

• Proceedings of the KSR Conference
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• 2008.06a
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• pp.1897-1902
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• 2008

The computer system is used in many application domains and any system error in these domains may either cause critical loss or threaten environment or human life. Though examples of these domains can be found in many areas, the system, which is used in domains for carrying passengers including rolling stocks in particular, is expected to show satisfactory operation all the time. The relay control logic, which is used in rolling stocks, is complex in hardware and occupies considerably large volume. Nevertheless, it has been used for a long time, to let the system safely operate even in the occurrence of an error in the computer system. However, the relay control logic circuit is so complex that the analysis of proper circuit operation and interlocking tends to be dependent only on the designer's experiences instead of being systematically performed. Especially, the analysis following a change, addition and deletion of a previous circuit according to the requirements from a source of demand is significantly limited. In this paper, the accuracy of relay control logic is verified by the use of properties of Petri Net model. In addition, how main circuit breaker (MCB) control circuit is modeled and analyzed by the design methodology is shown.