• 제목/요약/키워드: channel barrier

검색결과 214건 처리시간 0.098초

Modeling negative and positive temperature dependence of the gate leakage current in GaN high-electron mobility transistors

  • Mao, Ling-Feng
    • ETRI Journal
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    • 제44권3호
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    • pp.504-511
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    • 2022
  • Monte Carlo simulations show that, as temperature increases, the average kinetic energy of channel electrons in a GaN transistor first decreases and then increases. According to the calculations, the relative energy change reaches 40%. This change leads to a reduced barrier height due to quantum coupling among the three-dimensional motions of channel electrons. Thus, an analysis and physical model of the gate leakage current that includes drift velocity is proposed. Numerical calculations show that the negative and positive temperature dependence of gate leakage currents decreases across the barrier as the field increases. They also demonstrate that source-drain voltage can have an effect of 1 to 2 orders of magnitude on the gate leakage current. The proposed model agrees well with the experimental results.

Relation of Short Channel Effect and Scaling Theory for Double Gate MOSFET in Subthreshold Region (문턱전압이하 영역에서 이중게이트 MOSFET의 스켈링 이론과 단채널효과의 관계)

  • Jung, Hak-Kee
    • Journal of the Korea Institute of Information and Communication Engineering
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    • 제16권7호
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    • pp.1463-1469
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    • 2012
  • This paper has presented the influence of scaling theory on short channel effects of double gate(DG) MOSFET in subthreshold region. In the case of conventional MOSFET, to preserve constantly output characteristics,current and switching frequency have been analyzed based on scaling theory. To analyze the results of application of scaling theory for short channel effects of DGMOSFET, the changes of threshold voltage, drain induced barrier height and subthreshold swing have been observed according to scaling factor. The analytical potential distribution of Poisson equation already verified has been used. As a result, it has been observed that threshold voltage among short channel effects is grealty changed according to scaling factor. The best scaling theory for DGMOSFET has been explained as using modified scaling theory, applying weighting factor reflected the influence of two gates when scaling theory has been applied for channel length.

Characterization of Edible Film Fabricated with Channel Catfish Ictalurus punctatus Gelatin by Cross-Linking with Transglutaminase

  • Oh, Jun-Hyun
    • Fisheries and Aquatic Sciences
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    • 제15권1호
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    • pp.9-14
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    • 2012
  • The objectives of this research were to improve the film-forming properties of Channel Catfish Ictalurus punctatus skin gelatin (CSG) by cross-linking with transglutaminase (TG), determine and optimize the TG reaction time, and characterize the mechanical and barrier properties of CSG edible film. Cross-linking of CSG was performed by TG for 0, 10, 20, 30, and 40 min at $50^{\circ}C$, and the reaction was confirmed by sodium dodecyl sulfate-polyacrylamide gel electrophoresis (SDS-PAGE). The color and mechanical and barrier properties of edible films fabricated with CSG cross-linked with TG were characterized. Gelatin yields from the extraction ranged from 18.2% to 23.3%. SDS-PAGE exhibited dark bands at 120 and 250 kDa, indicating successful TG-mediated cross-linking. The color of CSG film was not affected by TG cross-linking. The tensile strength of CSG films cross-linked with TG decreased from 42.59 to 21.73 MPa and the percent elongation increased from 42.92% to 76.96% as reaction times increased from 0 to 40 min. There was no significant difference in water vapor permeability of CSG films.

Schottky Barrier Tunnel Field-Effect Transistor using Spacer Technique

  • Kim, Hyun Woo;Kim, Jong Pil;Kim, Sang Wan;Sun, Min-Chul;Kim, Garam;Kim, Jang Hyun;Park, Euyhwan;Kim, Hyungjin;Park, Byung-Gook
    • JSTS:Journal of Semiconductor Technology and Science
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    • 제14권5호
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    • pp.572-578
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    • 2014
  • In order to overcome small current drivability of a tunneling field-effect transistor (TFET), a TFET using Schottky barrier (SBTFET) is proposed. The proposed device has a metal source region unlike the conventional TFET. In addition, dopant segregation technology between the source and channel region is applied to reduce tunneling resistance. For TFET fabrication, spacer technique is adopted to enable self-aligned process because the SBTFET consists of source and drain with different types. Also the control device which has a doped source region is made to compare the electrical characteristics with those of the SBTFET. From the measured results, the SBTFET shows better on/off switching property than the control device. The observed drive current is larger than those of the previously reported TFET. Also, short-channel effects (SCEs) are investigated through the comparison of electrical characteristics between the long- and short-channel SBTFET.

Analysis of Drain Induced Barrier Lowering for Double Gate MOSFET Using Gaussian Distribution (가우스분포를 이용한 이중게이트 MOSFET의 드레인유기장벽감소분석)

  • Jung, Hak-Kee;Han, Ji-Hyung;Jeong, Dong-Soo;Lee, Jong-In;Kwon, Oh-Shin
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 한국해양정보통신학회 2011년도 추계학술대회
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    • pp.878-881
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    • 2011
  • In this paper, drain induced barrier lowering(DIBL) has been analyzed as one of short channel effects occurred in double gate(DG) MOSFET to be next-generation devices. Since Gaussian function been used as carrier distribution for solving Poisson's equation to obtain analytical solution of potential distribution, we expect our results using this model agree with experimental results. DIBL has been investigated according to projected range and standard projected deviation as variables of Gaussian function, and channel thickness and channel doping intensity as device parameter. Since the validity of this analytical potential distribution model derived from Poisson's equation has already been proved in previous papers, DIBL has been analyzed using this model.

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4H-SiC Trench-type Accumulation Super Barrier Rectifier(TASBR) for Low Forward Voltage drop (낮은 순방향 전압 강하를 갖는 4H-SiC Trench-type Accumulation Super Barrier Rectifier(TASBR))

  • Bae, Dong-woo;kim, Kwang-soo
    • Journal of IKEEE
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    • 제21권1호
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    • pp.73-76
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    • 2017
  • SiC devices have drawn much attentions for its wide band gap material properties. Especially 4H-SiC Schottky barrier diode is widely used for its rapid switching speed and low forward voltage drop. However, the low reliability of Schottky barrier diode has many problems that Super Barrier Rectifier(SBR) was researched for alternative. makes 4H-SiC trench-type accumulation super barrier rectifier(TASBR) is analyzed and proposed in this paper. We could verified that forward voltage drop was improved 21.06% without severe degradation of reverse breakdown voltage and leakage current based on the results from 2-D numerical simulations. With this novel rectifier structure, we can expect application with less power loss.

Influence on Short Channel Effects by Tunneling for Nano structure Double Gate MOSFET (나노구조 이중게이트 MOSFET에서 터널링이 단채널효과에 미치는 영향)

  • Jung, Hak-Kee
    • Journal of the Korea Institute of Information and Communication Engineering
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    • 제10권3호
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    • pp.479-485
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    • 2006
  • The double gate(DG) MOSFET is a promising candidate to further extend the CMOS scaling and provide better control of short channel effect(SCE). DGMOSFETs, having ultra thin undoped Si channel for SCEs control, ale being validated for sub-20nm scaling. A novel analytical transport model for the subthreshold mode of DGMOSFETs is proposed in this paper. The model enables analysis of short channel effect such as the subthreshold swing(SS), the threshold voltage roil-off$({\Delta}V_{th})$ and the drain induced barrier lowering(DIBL). The proposed model includes the effects of thermionic emission and quantum tunneling of carriers through the source-drain barrier. An approximative solution of the 2D Poisson equation is used for the distribution of electric potential, and Wentzel-Kramers-Brillouin approximation is used for the tunneling probability. The new model is used to investigate the subthreshold characteristics of a double gate MOSFET having the gate length in the nanometer range $(5-20{\sim}nm)$ with ultra thin gate oxide and channel thickness. The model is verified by comparing the subthreshold swing and the threshold voltage roll-off with 2D numerical simulations. The proposed model is used to design contours for gate length, channel thickness, and gate oxide thickness.

Improvement in the Negative Bias Stability on the Water Vapor Permeation Barriers on ZnO-based Thin Film Transistors

  • Han, Dong-Seok;Sin, Sae-Yeong;Kim, Ung-Seon;Park, Jae-Hyeong;Park, Jong-Wan
    • Proceedings of the Korean Vacuum Society Conference
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    • 한국진공학회 2012년도 제42회 동계 정기 학술대회 초록집
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    • pp.450-450
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    • 2012
  • In recent days, advances in ZnO-based oxide semiconductor materials have accelerated the development of thin-film transistors (TFTs), which are the building blocks for active matrix flat-panel displays including liquid crystal displays (LCD) and organic light-emitting diodes (OLED). In particular, the development of high-mobility ZnO-based channel materials has been proven invaluable; thus, there have been many reports of high-performance TFTs with oxide semiconductor channels such as ZnO, InZnO (IZO), ZnSnO (ZTO), and InGaZnO (IGZO). The reliability of oxide TFTs can be improved by examining more stable oxide channel materials. In the present study, we investigated the effects of an ALD-deposited water vapor permeation barrier on the stability of ZnO and HfZnO (HZO) thin film transistors. The device without the water vapor barrier films showed a large turn-on voltage shift under negative bias temperature stress. On the other hand, the suitably protected device with the lowest water vapor transmission rate showed a dramatically improved device performance. As the value of the water vapor transmission rate of the barrier films was decreased, the turn-on voltage instability reduced. The results suggest that water vapor related traps are strongly related to the instability of ZnO and HfZnO TFTs and that a proper combination of water vapor permeation barriers plays an important role in suppressing the device instability.

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CALCULATION OF FLOW FIFLD IN A CHANNEL SUBJECTED TO PRESSURE-BASED BOUNDARY CONDITION

  • Park, Jong-Hyeong;Lee, Jae-Hyeon
    • ETRI Journal
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    • 제10권4호
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    • pp.118-126
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    • 1988
  • A numerical analysis was performed for the flow field in the vertical channels consist of dummy cards and active cards to define the hydrodynamic role of dummy card which is often installed in electronic equipment between active cards to control the cooling air distribution. For a given velocity profile at the inlet and a pressure-based boundary condition at the outlet of the computation domain, the percentage of the flow rate distribution through active channel and dummy channel formed by an active card and dummy card, respectively, were investigated. As a result of present analysis, the pecentage of flow rate through active channel increases quadraticaly with the increase of the ratio of the height of barrier to the width of the dummy channel.

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Potential Barrier Shift Caused by Channel Charge in Short Channel GaAs MESFET (Short Channel GaAs MESFET의 채널전하분포와 채널전하에 의한 전위장벽의 변화)

  • Sub, Won-Chang;Lee, Myung-Soo;Ryu, Se-Hwan;Han, Deuk-Young;Ahn, Hyung-Keun
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • 제19권9호
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    • pp.793-799
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    • 2006
  • In this paper, the gate leakage current is first calculated using the experimental method between gate and drain by opening source electrode. the gate to drain current has been obtained with ground source. The difference between two currents has been tested and proves that the electric field generated by channel charge effect against the image force lowering.