• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2006년도 영호남 합동 학술대회 및 춘계학술대회 논문집 센서 박막 기술교육
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• pp.152-155
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• 2006

Carbon nitride ($CN_X$) films were prepared by reactive RF magnetron sputtering system at various deposition conditions and the C-V characteristics of MIS(metal - insulator - semiconductor) capacitors that have the structures of Al/$CN_x$/p-Si/Al and Al/$CN_x$/$Si_3N_4$/p-Si/Al were investigated. The resistivity of carbon nitride was above $2.40{\times}10^8{\Omega}{\cdot}cm$ at room temperature. The C-V plot showed a typical capacitance-voltage characteristics of semiconductor insulating layers, while it showed hysterisis due to interface charges. Amorphous carbon nitride (a-$CN_x$) films, that have relatively high resistivity and low dielectric constant could be useful as interlayer insulator materials of VLSI(very large-scale integration) and ULSI(ultra large-scale integration).

• 한국진공학회지
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• 제17권6호
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• pp.566-575
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• 2008

촉매 화학기상증착법을 이용하여 합성된 이중층 탄소나노튜브를 가지고 전계전자 방출원을 제작하여 이들의 신뢰성 있는 전계전자 방출특성을 조사하였다. 합성된 탄소 필라멘트들은 TEM, TGA, 그리고 Raman 분석을 통하여 결함이 없고 순도가 높은 이중층 탄소나노튜브가 합성이 되었음을 확인하였다. 이들 이중층 탄소나노튜브 전계전자 방출원은 이전극 구조에서 낮은 턴-온 전계와 높은 전류밀도의 전계전자 방출 특성을 보여주었고, 균질한 전계방출 패턴과 좋은 전계방출 안정성을 나타내었다.

• JSTS:Journal of Semiconductor Technology and Science
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• 제13권1호
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• pp.22-27
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• 2013

Detailed study on how the plasma process during the sidewall spacer formation suppresses the formation of silicide is done. In non-patterned wafer test, it is found that both fluorocarbon reactive ion etch (RIE) and TEOS plasma-enhanced deposition processes modify the Si surface so that the silicide reaction is chemically inhibited or suppressed. In order to investigate the cause of the chemical modification, we analyze the elements on the silicon surface through Auger Electron Spectroscopy (AES). From the AES result, it is found that the carbon induces chemical modification which blocks the reaction between silicon and nickel. Thus, protecting the surface from the carbon-containing plasma process prior to nickel deposition appears critical in successful silicide formation.

• JSTS:Journal of Semiconductor Technology and Science
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• 제6권2호
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• pp.106-113
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• 2006

Electrical properties of $Si_{0.88}Ge_{0.12}(C)$ p-MOSFETs have been exploited in an effort to investigate $Si_{0.88}Ge_{0.12}(C)$ channel structures designed especially to suppress diffusion of dopants during epitaxial growth and subsequent fabrication processes. The incorporation of 0.1 percent of carbon in $Si_{0.88}Ge_{0.12}$ channel layer could accomodate stress due to lattice mismatch and adjust bandgap energy slightly, but resulted in deteriorated current-voltage properties in a broad range of operation conditions with depressed gain, high subthreshold current level and many weak breakdown electric field in gateoxide. $Si_{0.88}Ge_{0.12}(C)$ channel structures with boron delta-doping represented increased conductance and feasible use of modulation doped device of $Si_{0.88}Ge_{0.12}(C)$ heterostructures.

• 에너지공학
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• 제19권1호
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• pp.16-20
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• 2010

본 연구에서는 바이오매스로 커피원두를 이용하여 합성한 카본재료에 도전재로 주석을 이용하였다. 주석을 첨가하는 방법에 따라 단순 혼합, 화학적인 방법을 이용하여 혼합체를 만들어 시료를 합성하였다. 시료에 대한 XRD를 이용하여 주석과 탄소가 혼합된 구조를 가지고 있음을 확인하였고 SEM을 통한 합성된 시료구입자크기($12{\sim}85\;{\mu}m$)와 형태를 확인하였다. 충 방전 테스트를 실시하여 15사이클에서 카본블랙을 사용했을 때(105 mAh/g)보다 주석을 화학적으로 혼합을 시킨 시료의 경우(191 mAh/g)가 방전용량이 더 높게 나타나는 것을 볼 수 있었고, 주석을 단순 혼합을 실시한 경우에서는 카본블랙과 비슷한 용량(131 mAh/g)을 보였다.

• 한국정밀공학회:학술대회논문집
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• 한국정밀공학회 2012년도 춘계학술대회 논문집
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• pp.463-464
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• 2012

• ETRI Journal
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• 제16권1호
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• pp.45-57
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• 1994

The effects of reactive ion etching (RIE) of $SiO_2$ layer in $CHF_3/C_2F_6$ on the underlying Si surface have been studied by X-ray photoelectron spectroscopy (XPS), secondary ion mass spectrometer, Rutherford backscattering spectroscopy, and high resolution transmission electron microscopy. We found that two distinguishable modified layers are formed by RIE : (i) a uniform residue surface layer of 4 nm thickness composed entirely of carbon, fluorine, oxygen, and hydrogen with 9 different kinds of chemical bonds and (ii) a contaminated silicon layer of about 50 nm thickness with carbon and fluorine atoms without any observable crystalline defects. To search the removal condition of the silicon surface residue, we monitored the changes of surface compositions for the etched silicon after various post treatments as rapid thermal anneal, $O_2$, $NF_3$, $SF_6$, and $Cl_2$ plasma treatments. XPS analysis revealed that $NF_3$ treatment is most effective. With 10 seconds exposure to $NF_3$ plasma, the fluorocarbon residue film decomposes. The remained fluorine completely disappears after the following wet cleaning.

• 한국진공학회:학술대회논문집
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• 한국진공학회 2008년도 제35회 하계학술대회 초록집
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• pp.337-337
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• 2008

• Transactions on Electrical and Electronic Materials
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• 제12권5호
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• pp.175-188
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• 2011

As complementary metal-oxide semiconductor (CMOS) continues to scale down deeper into the nanoscale, various device non-idealities cause the I-V characteristics to be substantially different from well-tempered metal-oxide semiconductor field-effect transistors (MOSFETs). The last few years witnessed a dramatic increase in nanotechnology research, especially the nanoelectronics. These technologies vary in their maturity. Carbon nanotubes (CNTs) are at the forefront of these new materials because of the unique mechanical and electronic properties. CNTFET is the most promising technology to extend or complement traditional silicon technology due to three reasons: first, the operation principle and the device structure are similar to CMOS devices and it is possible to reuse the established CMOS design infrastructure. Second, it is also possible to reuse CMOS fabrication process. And the most important reason is that CNTFET has the best experimentally demonstrated device current carrying ability to date. This paper discusses and reviewsthe feasibility of the CNTFET's application at this point of time in integrated circuits design by investigating different types of circuit blocks considering the advantages that the CNTFETs offer.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2002년도 하계학술대회 논문집 Vol.3 No.2
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• pp.805-808
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• 2002

A carbon monoxide gas sensor utilizing Pt-SiC, Pt-SnO2-SiC diode structure was fabricated. Since the operating temperature for silicon devices in limited to 200oC, sensor which employ the silicon substrate can not at high temperature. In this study, CO gas sensor operating at high temperature which utilize SiC semiconductor as a substrate was developed. Since the SiC is the semiconductor with wide band gap. the sensor at above $700^{\circ}C$. Carbon monoxide-sensing behavior of Pt-SiC, Pt-SnO2-SiC diode is systematically compared and analyzed as a function of carbon monoxide concentration and temperature by I-V and ${\Delta}$I-t method under steady-state and transient conditions.