• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.16 no.8
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• pp.657-662
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• 2003

This paper presents a new fabrication method of selective SiGe epitaxial growth at 650 $^{\circ}C$ on (100) silicon wafer with oxide patterns by reduced pressure chemical vapor deposition. The new method is characterized by a cyclic process, which is composed of two parts: initially, selective SiGe epitaxy layer is grown on exposed bare silicon during a short incubation time by SiH$_4$/GeH$_4$/HCl/H$_2$system and followed etching step is achieved to remove the SiGe nuclei on oxide by HCl/H$_2$system without source gas flow. As a result, we noted that the addition of HCl serves not only to reduce the growth rate on bare Si, but also to suppress the nucleation on SiO$_2$. In addition, we confirmed that the incubation period is regenerated after etching step, so it is possible to grow thick SiGe epitaxial layer sustaining the selectivity. The effect of the addition of HCl and dopants incorporation was investigated.

• Applied Science and Convergence Technology
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• v.26 no.6
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• pp.174-178
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• 2017

The reactions of thermal hydrogen atoms H(g) with the Ge(100) surface were examined with temperature-programmed desorption (TPD) mass spectrometry. Concomitant $H_2$ and $CH_4$ TPD spectra taken from the H(g)-irradiated Ge(100) surface were distinctly different for low and high H(g) doses/substrate temperatures. Reactions suggested by our data are: (1) adsorbed mono(${\beta}_1$)-/di-hydride(${\beta}_2$)-H(a) formation; (2) H(a)-by-H(g) abstraction; (3) $GeH_3$(a)-by-H(g) abstraction (Ge etching); and (4) hydrogenated amorphous germanium a-Ge:H formation. While all these reactions occur, albeit at higher temperatures, also on Si(100), H(g) absorption by Ge(100) was not detected. This is in contrast to Si(100) which absorbed H(g) readily once the surface roughened on the atomic scale. While this result is rather against expectation from its weaker and longer Ge-Ge bond as well as a larger lattice constant, we attribute the absence of direct H(g) absorption to insufficient atomic-scale surface roughening and to highly efficient subsurface hydrogenation at moderate (>300 K) and low (${\leq}300K$) temperatures, respectively.

• Proceedings of the KAIS Fall Conference
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• 2004.06a
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• pp.172-175
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• 2004

This paper analyzes the effects of Ge profiles shape of SiGe heterojunction bipolar transistors (HBT's) for high frequency application. Device simulations using ATLAS/BLAZE for the SiGe HBT with trapezoidal or triangular Ge profile are carried out to optimize the device performance. An HBT with $15\%$ triangular Ge profile shows higher cut-off frequency and DC current gain than that with $19\%$ trapezoidal Ge profile. The cut-off frequency and DC gain are increased from 42GHz to 84GHz and from 200 to 600, respectively. The SiGe HBT has been fabricated using a production CVD reactor.

• Proceedings of the Korean Institute of Communication Sciences Conference
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• 2004.11a
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• pp.422-422
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• 2004

• Journal of the Korean institute of surface engineering
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• v.29 no.5
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• pp.407-414
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• 1996

We have investigated the effects of H atoms on thin film growth processes and surface reactions. In the oxidation of Si, Si surfaces are passivated against the $O_2$ adsorption by terminating dangling bonds with H atoms. Moreover, the existence of Si-H bonds on Si(100) surfaces enhances the structural relaxation of Si-O-Si bonds due to a charge transfer from Si-Si back bonds. In the heteroepitaxial growth of a Si/Ge/Si(100) system, H atoms suppress the segregation of Ge atoms into Si overlayers since the exchange of Ge atoms with Si atoms bound with H must be accompanied with breaking of Si-H bonds. However, 3-dimensional island growth is also promoted by atomic H irradiation, which is considered to result from the suppression of surface migration of adsorbed reaction species and from the lowering of step energies by the H termination of dangling bonds.

• Proceedings of the KIEE Conference
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• 1994.07b
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• pp.1435-1438
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• 1994

The effects of Ge composition variation in $a-Si_{1-x}Ge_x:H$ alloy p-i-n solar cells on the physical properties and current density-voltage characteristics are analyzed by a new simulation modelling based on the update published experimental datas. The simulation modelling includes newly formulated density of gap density spectrum corresponding to Ge composition variation and utilizes the newly derived generation rate formulars which include the reflection coefficients and can apply to multijunction structures as well as single junction structure. The effects in $a-Si_{1-x}Ge_x:H$ single junction are analyzed through the efficiency, fill factor, open circuit voltage, short circuit current density, free carriers, trap carriers, electric field, generation rate and recombination rate. Based on the results analyzed in single junction structure, the applications to multiple junction structures are discussed and the optimal conditions reaching to a high performance are investigated.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.42 no.9 s.339
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• pp.1-8
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• 2005

A $0.35\mu$m SiGe BiCMOS fabrication process has been timely developed, which is aiming at wireless RF ICs development and fast growing SiGe RF market. With non-selective SiGe epilayer, SiGe HBTs in this process used trapezoidal Ge base profile for the enhanced AC performance via Ge induced bandgap niuoin. The characteristics of hFE 100, $f_{T}\;45GHz,\;F_{max}\;50GHz,\;NF_{min}\;0.8dB$ have been obtained by optimizing not only SiGe base profile but also RTA condition after emitter polysilicon deposition, which enables the SiGe technology competition against the worldwide cutting edge SiGe BiCMOS technology. In addition, the process incorporates the CMOS logic, which is fully compatible with $0.35\mu$m pure logic technology. High Q passive elements are also provided for high precision analog circuit designs, and their quality factors of W(1pF) and inductor(2nH) are 80, 12.5, respectively.

• Proceedings of the IEEK Conference
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• 2004.06a
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• pp.213-216
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• 2004

This paper describes design and implementation of the 5.5 GHz VCO with parallel-branch inductors using 0.8${\mu}m$ SiGe HBT process technology. The proposed parallel-branch inductor shows $12 \%$ improvement in quality factor in comparison with the conventional inductor. A phase noise of -93 dBc/Hz is measured at 100 kHz offset frequency, and the harmonics in the VCO are suppressed less than -23 dBc. The single-sided output power of the VCO is -6.5$\pm$1.5 dBm. The manufactured VCO consumes 15.0 mA with 2.5 V supply voltage. Its chip areas are 1.8mm ${\times}$ 1.2mm.

• Proceedings of the KIEE Conference
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• 1997.11a
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• pp.314-316
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• 1997

We have studied the epitaxial growth and electrical properties of $Si_{0.8}Ge_{0.2}$, films on Si substrates at $550^{\circ}C$ by LPCVD. In a low $PH_3$, partial pressure region such as below 1.25 mPa, the phosphorus doping concentration increased proportionally with increasing $PH_3$ partial pressure while the deposition rate and the Ge fraction x were constant. In a higher $PH_3$ partial pressure region, the phosphorus doping concentration and the deposition rate decreased, while the Ge fraction slightly increased. The dependence of P incorporation rate on the $PH_3$ partial pressure was similar to the phosphorus doping concentration. According to test results, it suggests that high surface coverage of phosphorus atoms suppress both the $SiH_4$ adsorption/reaction and the $GeH_4$ adsorption/reaction on the surfaces, and the effect is more stronger on $SiH_4$ than on $GeH_4$. In a higher $PH_3$ partial pressure region, the deposition is largely controlled by surface coverage effect of phosphorus atoms.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.22 no.11
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• pp.910-917
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• 2009

We have designed a new structures of Junction Field Effect Transistor(JFET) using SILVACO simulation to improve electrical properties and process reliability. The device structure and process conditions of Si control JFET(Si JFET) were determined to set cut off voltage and drain current(at Vg=0 V) to -0.46 V and $300\;{\mu}A$, respectively. Among many design parameters influencing the performance of the device, the drive-in time of p-type gate is presented most predominant effects. Therefore we newly designed SiGe JFET, in which SiGe layers were placed above and underneath of Si-channel. The presence of SiGe layer could lessen Boron into the n-type Si channel, so that it would be able to enhance the structural consistency of p-n-p junction. The influence of SiGe layer could be explained in conjunction with boron diffusion and corresponding I-V characteristics in comparison with Si-control JFET.