• Smart Structures and Systems
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• v.19 no.5
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• pp.567-576
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• 2017

Design of piezoelectric energy harvester for a wide operating frequency range is a challenging problem and is currently being investigated by many researchers. Widening the operating frequency is required, as the energy is harvested from ambient source of vibration which consists of spectrum of frequency. This paper presents a new technique to increase the operating frequency range which is achieved by designing a harvester featured by a propped cantilever beam with variable over hang length. The proposed piezoelectric energy harvester is modeled analytically using Euler Bernoulli beam theory and the effectiveness of the harvester is demonstrated through experimentation. The results from analytical model and from experimentation reveal that the proposed energy harvester generates an open circuit output voltage ranging from 36.43 V to 11.94 V for the frequency range of 27.24 Hz to 48.47 Hz. The proposed harvester produces continuously varying output voltage and power in the broadened operating frequency range.

• The Transactions of the Korean Institute of Power Electronics
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• v.16 no.3
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• pp.242-249
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• 2011

The proposed converter has easy device selection for high step-up and high power applications since boost half bridge and voltage doubler cells are connected, respectively, in parallel and series in order to increase output power and voltage. Especially, optimized design of high frequency transformers is possible owing to reduced turn ratio and eliminated dc offset, and distributed power through three cores is beneficial to low profile and thermal distribution. The proposed converter does not necessitate start-up circuit and additional clamp circuit due to the use of whole duty range between 0 and 1 and is suitable for applications with wide input voltage range. Also, high efficiency can be achieved since ZVS turn on of switches are achieved in wide duty cycle range and ZCS turn on and off of diodes are achieved. The proposed converter was validated through 5 kW prototype.

• Journal of IKEEE
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• v.22 no.1
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• pp.174-179
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• 2018

In this paper, design of high-efficiency DC-DC converter is presented for low-power PMIC (power management integrated circuit). As PMIC technologies for IoT and wearable devices have been continuously improved, high-efficiency energy harvesting schemes should be essential. Since the supply voltage resulting from energy harvesting is low and widely variable, design techniques to achieve high efficiency over a wide input voltage range are required. To obtain a constant switching frequency for wide input voltage range, frequency compensation circuit using supply-voltage variation sensing circuit is included. In order to obtain high efficiency performance at very low-power condition, accurate burst-mode control circuit was adopted to control switching operations. In the proposed DC-DC buck converter, output voltage is set to be 0.9V at the input voltage of 0.95~3.3V and maximum measured efficiency is up to 78% for the load current of 180uA.

• ETRI Journal
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• v.33 no.2
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• pp.201-209
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• 2011

This paper presents a wide-band fine-resolution digitally controlled oscillator (DCO) with an active inductor using an automatic three-step coarse and gain tuning loop. To control the frequency of the DCO, the transconductance of the active inductor is tuned digitally. To cover the wide tuning range, a three-step coarse tuning scheme is used. In addition, the DCO gain needs to be calibrated digitally to compensate for gain variations. The DCO tuning range is 58% at 2.4 GHz, and the power consumption is 6.6 mW from a 1.2 V supply voltage. An effective frequency resolution is 0.14 kHz. The phase noise of the DCO output at 2.4 GHz is -120.67 dBc/Hz at 1 MHz offset.

• Journal of the Institute of Electronics and Information Engineers
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• v.50 no.12
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• pp.63-70
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• 2013

This paper describes a high PSRR low-dropout(LDO) linear regulator for wide frequency range without output-capacitor. Owing to both of the cascode compensation technique and the current buffer compensation technique in nested Miller compensation loop, the proposed LDO not only maintaines high stability but also achieves high PSRR over wide frequency range with reasonable on-chip capacitances. Since the external capacitor is removed by the proposed compensation techniques, the cost for pad is eliminated. The designed LDO works under the input voltage range from 2.5V to 4.5V and provides up to 10mA load current with the output voltage of 1.8V. The LDO was implemented with 0.18um CMOS technology and the area is 300um X 120 um. The measured power supply rejection ratio(PSRR) is -76dB and -43dB at DC and 1MHz, respectively. The operating current is 25uA.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.40 no.6
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• pp.408-420
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• 2003

This paper describes a Delay Locked Loop (DLL) circuit having two advancements : 1) a dual loop operation for a wide lock-range and 2) programmable replica delays using antifuse circuitry and internal voltage generator for a post-package skew calibration. The dual loop operation uses information from the initial time-difference between reference clock and internal clock to select one of the differential internal loops. This increases the lock-range of the DLL to the lower frequency. In addition, incorporation with the programmable replica delay using antifuse circuitry and internal voltage generator allows for the elimination of skews between external clock and internal clock that occur from on and off-chip variations after the package process. The proposed DLL, fabricated on 0.16m process, operates over the wide range of 42MHz - 400MHz with 2.3v power supply. The measured results show 43psec peak-to-peak jitter and 4.71psec ms jitter consuming 52㎽ at 400MHz.

• Journal of Power Electronics
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• v.16 no.6
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• pp.2024-2034
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• 2016

This paper presents a DC-DC buck converter with a Phase-Locked Loop (PLL) that can compensates for power efficiency degradation over a wide input range. Its switching frequency is kept at 2 MHz and the delay difference between the High side driver and the Low side driver can be minimized with respect to Process, Voltage and Temperature (PVT) variations by adopting the PLL. The operation mode of the proposed DC-DC buck converter is automatically changed to Pulse Width Modulation (PWM) or PWM frequency modes according to the load condition (heavy load or light load) while supporting a maximum load current of up to 1.2 A. The PWM frequency mode is used to extend the CCM region under the light load condition for the PWM operation. As a result, high efficiency can be achieved under the light load condition by the PWM frequency mode and the delay compensation with the PLL. The proposed DC-DC buck converter is fabricated with a $0.18{\mu}m$ BCD process, and the die area is $3.96mm^2$. It is implemented to have over a 90 % efficiency at an output voltage of 5 V when the input range is between 8 V and 20 V. As a result, the variation in the power efficiency is less than 1 % and the maximum efficiency of the proposed DC-DC buck converter with the PLL is 95.4 %.

• Journal of Electrical Engineering and Technology
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• v.13 no.3
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• pp.1326-1336
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• 2018

This paper proposes a numerical approach to predict the critical flashover voltages of air gaps under lightning impulses. For an air gap, the impulse voltage waveform features and electric field features are defined to characterize its energy storage status before the initiation of breakdown. These features are taken as the input parameters of the predictive model established by support vector machine (SVM). Given an applied voltage range, the golden section search method is used to compute the prediction results efficiently. This method was applied to predict the critical flashover voltages of rod-rod, rod-plane and sphere-plane gaps over a wide range of gap lengths and impulse voltage waveshapes. The predicted results coincide well with the experimental data, with the same trends and acceptable errors. The mean absolute percentage errors of 6 groups of test samples are within 4.6%, which demonstrates the validity and accuracy of the predictive model. This method provides an effectual way to obtain the critical flashover voltage and might be helpful to estimate the safe clearances of air gaps for insulation design.

• Journal of Power Electronics
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• v.18 no.1
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• pp.266-276
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• 2018

This paper presents a new step-up and step-down multi-pulse auto-transformer rectifier unit (ATRU) topology. This structure can achieve a wide range of output voltages, which solves the problem of auto-transformer output voltage being difficult to regulate. Adding middle taps to the primary winding and reasonably setting the number of auto-transformer windings, constituted two groups of three-phase output voltages with a $30^{\circ}$ phase difference. Multi-pulse output DC voltage is obtained after a three-phase output voltage across two rectifier bridges and inter-phase reactor. Thus, the output DC voltage is related to the number and configuration of the auto-transformer winding. In this paper, the relationship between the voltage ratio of the auto-transformer and the ratio of winding, input current and auto-transformer kilovoltampere rating are deduced and validated by simulations. On this basis, the output voltage range is optimized. An experiment on two different voltage ratio principle prototypes was carried out to verify the correctness of the analysis design.

• The Transactions of the Korean Institute of Power Electronics
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• v.20 no.5
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• pp.437-447
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• 2015

In this paper, implementation of an integrated transformer applicable to power supply units (PSUs) for a 150-W LED with a wide range of output voltage is presented. The transformer is comprised of a PFC inductor and an LLC resonant transformer, each of which is placed and integrated on an E-I-E-type magnetic core. Integrated transformers with two different air gap topologies (i.e., the side and center gap topologies) are considered in the design phase to investigate their applicability. The design consideration on the LLC resonant converter used for the wide-output-voltage control ranges is described, and the overall performance of the proposed system is verified through realization of it onto a 150-W LED PSU board.