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http://dx.doi.org/10.5573/ieek.2013.50.12.063

A Design of High PSRR LDO over Wide Frequency Range without External Capacitor  

Kim, Jin-Woo (Department of Electronics Engineering, Seokyeong University)
Lim, Shin-Il (Department of Electronics Engineering, Seokyeong University)
Publication Information
Journal of the Institute of Electronics and Information Engineers / v.50, no.12, 2013 , pp. 63-70 More about this Journal
Abstract
This paper describes a high PSRR low-dropout(LDO) linear regulator for wide frequency range without output-capacitor. Owing to both of the cascode compensation technique and the current buffer compensation technique in nested Miller compensation loop, the proposed LDO not only maintaines high stability but also achieves high PSRR over wide frequency range with reasonable on-chip capacitances. Since the external capacitor is removed by the proposed compensation techniques, the cost for pad is eliminated. The designed LDO works under the input voltage range from 2.5V to 4.5V and provides up to 10mA load current with the output voltage of 1.8V. The LDO was implemented with 0.18um CMOS technology and the area is 300um X 120 um. The measured power supply rejection ratio(PSRR) is -76dB and -43dB at DC and 1MHz, respectively. The operating current is 25uA.
Keywords
LDO; On-Chip; Regulator; PSRR; Capacitorless;
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